We describe a multi-layer security system called "Application Protected Execution" (APEx) that has an "In-VM monitoring" functionality protected by out-of-band memory created within a Virtual Machine (VM) on cloud-based nodes. The In-VM monitor functionality protects execution of security related software and is triggered by hooked system events to avoid context switched overhead. The APEx system is a robust defense layer that can protect a wide variety of security modules, such as security monitoring and policy enforcement. The paper also describes an application that employs APEx to protect user space software from reverse engineering and Return Oriented Programming (ROP) attacks. The application, "Code Obfuscation Engine" (CObE) performs code stirring and utilizes system calls and out-of-band memory to obfuscate program flow and protect the return stack. Utilizing APEx, it is able to jump into out-of-band memory for execution of sensitive code areas, calculation of jump points and return addresses. This protects program flow against hijacking-particularly buffer overflows and ROP attacks. CObE transforms a binary file for use with APEx protected execution directly and does not require source code.

This paper presents a design environment for cycle-based systems, such as microprocessors, that permits modeling of these systems at various levels, from the abstract system level, through the detailed RTL level, to an actual implementation. The environment allows the models to be refined to lower levels in a step-wise manner. The environment provides the ability to obtain meaningful metrics from abstract models of a processor's architecture. This capability allows design alternatives to be evaluated earlier in the design cycle, thus eliminating costly redesign and reducing the processor time to market.

The design of complex systems requires an enormous amount of modeling and simulation at the various levels of detail to assure high quality results. Most design methodologies require the use of separate modeling languages and simulation environments for each refinement step and simulation technique. Since one of the major goals of design is to reduce the time to market for a given system, the current approaches are becoming unacceptable. A new unified modeling (UM) methodology is under development at the University of Virginia which provides a top-down/bottom-up design methodology based on a single modeling environment. This single environment methodology is made possible through a technique known as hybrid modeling, which enable the simulation and analysis of behavioral components within a system-level model. By simulating behavioral components along with components at the system modeling level, high risk portions of the design can be examined at earlier stages in a given product's development; thus reducing the time to market. The paper examines the hybrid modeling techniques which make this multi-level modeling possible.