By using two magnetic-bubble positions per bit it is possible to develop simple logical circuits which display essentially unlimited fan-in and fan-out. Systems of these circuits can be organized such that they conserve bubbles. Pipelining methods can be employed to enhance the throughput.

Cascades of only three different primitive 3-3 magnetic bubble logic circuits are shown to realize 29 of the 31 equivalence classes of such circuits. The results are compared with earlier realizations using a set of 15 primitives.

This paper is a survey of research on microcellular techniques. Of particular interest are those techniques that are appropriate for realization by modern batch-fabrication processes, since the rapid emergence of reliable and economical batch-fabricated components represents probably the most important current trend in the field of digital circuits. First the manufacturing methods for batch-fabricated components are reviewed, and the advantages to be realized from the application of the principles of cellular logic design are discussed. Also two categorizations of cellular arrays are made in terms of the complexity of each cell (only low-complexity cells are considered) and in terms of the various application areas. After a survey of very early techniques that can be viewed as exemplifying cellular approaches, modern-day cellular arrays are discussed on the basis of whether they are fixed cell-function arrays or variable cell-function arrays. In the fixed cell-function arrays the switching function produced by each cell is fixed; the cell parameters are used only in the modification of the interconnection structure. Several versions of NOR gate arrays, majority gate arrays, adder arrays, and others are reviewed in terms of synthesis techniques and array growth rates. Similarly, the current status of research is summarized in variable cell-function arrays, where not only the interconnection structure but also the function produced by each cell is determined by parameter selection. These arrays include various general function cascades, outpoint arrays, and cobweb arrays, for example. Again, the various cell types that have been considered are pointed out, as well as synthesis procedures and growth rates appropriate for them. Finally, several areas requiring further research effort are summarized. These include the need for more realistic measures of array growth rates, the need for synthesis techniques for multiple-function arrays and programmable arrays, and the need for fault-avoidance algorithms in integrated structures.

A cutpoint cellular array is a two-dimensional rectangular arrangement of square cells, each of which has binary inputs on the top and left edges and outputs on the bottom and right edges. Each cell is interconnected with neighboring cells, and it is specialized by a set of binary constants that are termed cutpoints. This paper is concerned with the choice of the logical properties for each cutpoint cell, so that an array of these cells is capable of efficient and general combinational and sequential logic. Logical design algorithms are given, as well as a number of actual designs. It is believed that cutpoint cellular arrays have promise for application in the manufacture of a large number of integrated circuit components on one substrate.

A number of the more commonly known magnetic core access switches are combined in a single analytical model. In addition to yielding as special cases the known access switches on which it is based, this model produces many apparently new switches. Relationships among the various parameters in this model are developed in such a way that the designer may choose the number of drivers, the load-sharing factor, the number of turns of wire per switch core and the magnitude of the maximum disturbing magnetomotive force within certain limits. Several methods are developed for economizing on the number of drivers used in switches, and certain special access switches are treated. The current knowledge is reviewed on a fairly recent and important class of access switches, known as load-sharing zero-noise switches. These switches are compared with one another, and a fundamental theorem is proved that such switches can have no more outputs than inputs. Several new classes of load-sharing zero-noise switches are developed and analyzed; in particular, switches are developed which allow more flexibility in the choice of the load-sharing factor than formerly was the case.

Techniques are developed for the logical design of magnetic core circuits to produce arbitrary single-output combinational switching functions. The approach is based on the relationship of a single magnetic core circuit to a linearly separable switching function. A synthesis procedure is developed which uses a pair of logical primitives, AND with NOT and OR with NOT, which are similar to the STROKE primitive and its inverse. Procedures are developed for the synthesis of symmetric functions which require no more than the integral part of (n+3)/2 cores, approximately half the number used in previously published procedures. The synthesis of arbitrary switching circuits is treated as a linear programming problem, and a table of all four-variable circuits is presented in which no circuit requires more than three cores.

article Free AccessTshebysheff Approximations for Power Series Author: Robert C. Minnick ElectroData Division of Burroughs Corporation, Pasadena, California and Harvard University, Cambridge, Mass. ElectroData Division of Burroughs Corporation, Pasadena, California and Harvard University, Cambridge, Mass.View Profile Authors Info & Claims Journal of the ACMVolume 4Issue 4Oct. 1957 pp 487–504https://doi.org/10.1145/320893.320905Published:01 October 1957Publication History 5citation330DownloadsMetricsTotal Citations5Total Downloads330Last 12 Months16Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF