FPGA (Field Programmable Gate Array) synthesis tools are crucial for hardware development and AI acceleration, and their bugs could compromise hardware reliability and risk downstream applications. However, it remains unknown in understanding the characteristics of these bugs. What are the root causes that trigger bugs in FPGA synthesis tools? What are the characteristics of these bugs? What are the challenges in detecting and addressing them? This paper takes the first step towards answering these questions by conducting a comprehensive study of FPGA synthesis tool bugs. We analyze 551 confirmed bugs in both commercial and open source FPGA synthesis tools, i.e., Vivado, Quartus Prime, and Yosys, covering root causes, symptoms, bug-prone components, fix characteristics, and achieve 17 valuable findings. We find that, on average, around 46.2% of bugs result from HDL (Hardware Description Language) standard noncompliance across the three tools. However, it is hard for current formal validations to fully test HDL standards compliance. Additionally, on average over 25.8% bugs show domain-specific optimization traits due to inappropriate optimization and mapping. Meanwhile, beyond 28% of bugs trigger unexpected behavior without clear signs, making the formulation of effective test oracles challenging. These findings help addressing FPGA synthesis tool bugs and guide further research.

High-level synthesis (HLS) tools have been widely used in field-programmable gate array (FPGA) design to convert C/C++ code to hardware description language code. Unfortunately, HLS tools are susceptible to bugs, which can introduce serious vulnerabilities in FPGA products, leading to substantial losses. However, the characteristics of these bugs (e.g., root causes and bug-prone stages) have never been systematically studied, which significantly hinders developers from effectively handling HLS tool bugs. To this end, we conduct the first empirical study to uncover HLS tool bug characteristics. We collect 349 bugs of a widely used HLS tool, namely Bambu. We study the root causes, buggy stages, and bug fixes of these bugs by applying a multiperson collaboration method. Finally, 13 valuable findings are summarized. We find 14 categories of root causes in Bambu bugs; most bugs (22.1%) are caused by incorrect implementation of IR processing; the front end of Bambu is more bug-prone; to fix these bugs, 2.27 files and 80.19 lines of code need to be modified on average. We also present the insights gained from 95 Vitis HLS bugs. From these findings, we suggest that developers could use an on-the-fly code generator configuration method to generate suitable testing programs for HLS tool bug detection and apply large language models to assist in fixing HLS tool bugs.