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Yi-Chao Chan

dblp:64/7450 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 2009
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Human-computer interaction and ubiquitous computing · 1 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 50% Interconnection networks and networks-on-chip · 33% Processor architecture and microarchitecture · 17%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
cache coherence
0.112009
No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips · DAC 2009
Memory systems
cache design
0.112009
No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips · DAC 2009
Processor architecture and microarchitecture
multicore design
0.112009
No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips · DAC 2009
Memory systems › cache design
non-uniform cache architecture
0.112009
No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips · DAC 2009
Interconnection networks and networks-on-chip
on-chip interconnect
0.112009
No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips · DAC 2009
Interconnection networks and networks-on-chip
ring network
0.112009
No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips · DAC 2009

Methods — techniques the papers use, named apart from their topics

path prediction · 0.1circuit-switched routing · 0.1binary-tree path convergence · 0.1
YearPublicationVenuePosition
2009 No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips
abstract
Consistent with the trend towards the use of many cores in SOC and 3D Chip techniques, this paper proposes a "single-cycle ring" interconnection (SC_Ring) with ultra-low latency and minimal complexity. The proposed SC_Ring allows multiple single-cycle transactions in parallel. The main features of the circuit-switched design include a set of 3-ported circuit-switched routers (4~16) and a performance/timing effective arbiter. The arbiter, called "BTPC", features single-cycle arbitration and routing-control by means of the novel Binary-Tree paths convergence and path-prediction mechanisms, to provide a highly reduced time complexity. By combining this with the integration of 3D chips, the proposed ring-based interconnection offers several advantages for hierarchical clustering in future many-core systems, in terms of cost, latency, and power reductions. Moreover, based on the proposed SC_Ring, this work realizes a "level-1 non-uniform cache architecture" (L1-NUCA) for fast data communication without cache-coherency in facilitating multithreading/multi-core as a case study. Finally, experimental results show that our approach yields promising performance.
Shu-Hsuan Chou, Chien-Chih Chen, Chi-Neng Wen, Yi-Chao Chan, Tien-Fu Chen, Chao-Ching Wang, Jinn-Shyan Wang
DAC4
2006 Estimating Parameters of Kernel Functions in Support Vector Learning
abstract
The selection and modification of kernel functions is a very important but rarely studied problem in the field of support vector learning. However, the kernel function of a support vector machine has great influence on its performance. The kernel function projects the dataset from the original data space into the feature space, and therefore the problems which can't be done in low dimensions could be done in a higher dimension through the transform of the kernel function. In this paper, we adopt the FCM clustering algorithm to group data patterns into clusters, and then use a statistical approach to calculate the standard deviation of each pattern with respect to the other patterns in the same cluster. Therefore we can make a proper estimation on the distribution of kernel functions. Experimental results have shown that our approach can derive better kernel functions than other methods, and also can have better learning and generalization abilities.
Yi-Chao Chan, Wan-Jui Lee, Shie-Jue Lee
SMC1