Hardware sharing can be used to reduce the area and the power dissipation of a design. This is of particular interest in the field of image and video compression, where an encoder must deal with different design tradeoffs depending on the characteristics of the signal to be encoded and the constraints imposed by the users. This paper introduces a novel methodology for exploring the design space based on the amount of hardware sharing between different functional blocks, giving as a result a set of feasible solutions which are broad in terms of hardware cost and throughput capabilities. The proposed approach, inspired by the notion of a partition in set theory, has been applied to optimize and to evaluate the sharing alternatives of a group of image and video compression key computational kernels when mapped onto a Xilinx Virtex-5 FPGA.

This paper proposes a novel approach for design space exploration by characterizing hardware sharing based on the notion of a partition in set theory. Related designs with different degrees of hardware sharing can be captured concisely by a Hasse diagram, highlighting designs with shared building blocks. Hardware sharing can be implemented in various ways, such as component multiplexing, instruction-set processors, or run-time reconfiguration. We illustrate how the proposed approach can be applied to exploring the design space for FPGA implementations of JPEG image compression.

A generic flow control (GFC) protocol is proposed to regulate multiple terminals within the broadband-ISDN customer premises network. The GFC protocol is based on multipriority distributed queuing preceded by a traffic shaping function, and meets the requirements for flexible allocation of service parameters, control of jitter and guarantee of bandwidth. This GFC protocol provides the necessary flexibility to match the constant bit rate (CBR) jitter performance and variable bit rate (VBR) service requirements to the particular service type. It integrates well with usage parameter control without imposing excessive burstiness on each virtual connection cell stream delivered to the network. By allowing connectionless users to access at the lowest priority, only when no higher priority users are queued, there is no reduction in guaranteed capacity available for other VBR and CBR users.>

The authors consider a multipriority queuing system which involves several distributed local queues and a central server which performs round-robin processor sharing (RRPS). This queuing model, referred to as multiqueue processor sharing (MPS), is an extension of Kleinrock's classical processor sharing model with generalization to multiple priorities and the addition of a buffer at each traffic source for each priority to buffer additional packets queued at that source. The authors present an exact analysis of the MPS model which leads to a closed-form result for the mean packet delay as a function of the packet length for each priority. It is demonstrated by simulation that the result obtained is applicable for accurately computing the average packet delay for a DQDB (distributed queue dual bus) subnetwork, given that stations transmitting on the same bus are not widely separated.>

Crosstalk theory is applied to the prediction of error rates in digital line systems due to analog telephony signaling events on adjacent pairs in the same cable. Measurements of the margin against impulsive noise at a given probability of error have been performed, and these show reasonable agreement with predictions based on crosstalk theory. For a simple switching event, the regenerator NEXT impulsive noise figure for the near-end crosstalk path is defined. Measurements of the mean and variance of near-end crosstalk attenuation are then used to calculate the maximum exchange section loss (from central office to first line regenerator) which satisfies a suggested error performance criterion.