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William J. Hery

dblp:65/6617 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 1989
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Distributed systems · 50% Embedded and real-time systems · 25% Electronic design automation · 19%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Distributed systems › fault tolerance
fault detection and diagnosis
0.011989
Spare Capacity as a Means of Fault Detection and Diagnosis in Multiprocessor Systems · IEEE Trans. Computers 1989
Embedded and real-time systems › real-time scheduling
multiprocessor scheduling
0.011989
Spare Capacity as a Means of Fault Detection and Diagnosis in Multiprocessor Systems · IEEE Trans. Computers 1989
Distributed systems › replication
process replication
0.011989
Spare Capacity as a Means of Fault Detection and Diagnosis in Multiprocessor Systems · IEEE Trans. Computers 1989
Electronic design automation › hardware verification and test
fault detection
0.011987
Performance Analysis of a Fault Detection Scheme in Multiprocessor Systems · SIGMETRICS 1987
Parallel and multicore computing
multiprocessor system
0.011987
Performance Analysis of a Fault Detection Scheme in Multiprocessor Systems · SIGMETRICS 1987

Methods — techniques the papers use, named apart from their topics

queuing analysis · 0.0process redundancy · 0.0preemptive scheduling · 0.0non-preemptive scheduling · 0.0
YearPublicationVenuePosition
1989 Spare Capacity as a Means of Fault Detection and Diagnosis in Multiprocessor Systems
abstract
A technique for detecting and diagnosing faults at the processor level in a multiprocessor system is described. A process is assigned whenever possible to two processors: the processor to which it would normally be assigned (primarily) and an additional processor that would otherwise be idle (secondary). Two strategies are described and analyzed: one that is preemptive and another that is nonpreemptive. It is shown that, for moderately loaded systems, a sufficient percentage of processes can be performed redundantly using the system's spare capacity to provide a basis for fault detection and diagnosis with virtually no degradation of response time. A multiprocessor that uses the approach for detecting faults at the processor loads is described.>
Anton T. Dahbura, Krishan K. Sabnani, William J. Hery
IEEE Trans. Computers3
1987 Performance Analysis of a Fault Detection Scheme in Multiprocessor Systems
abstract
A technique is described for detecting and diagnosing faults at the processor level in a multiprocessor system. In this method, a process is assigned whenever possible to two processors: the processor that it would normally be assigned to (primary) and an additional processor which would otherwise be idle (secondary). Two strategies will be described and analyzed: one which is preemptive and another which is non-preemptive. It is shown that for moderately loaded systems, a sufficient percentage of processes can be performed redundantly using the system's spare capacity to provide a basis for fault detection and diagnosis with virtually no degradation of response time.
Anton T. Dahbura, Krishan K. Sabnani, William J. Hery
SIGMETRICS3