Luciano Briozzo

dblp:65/853 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 1998
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Performance modeling and evaluation · 44% Integrated circuit design · 44% Embedded and real-time systems · 13%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › VLSI design
digital VLSI
0.011998
Accuracy vs. Precision in Digital VLSI Architectures for Signal Processing · IEEE Trans. Computers 1998
Performance modeling and evaluation › statistical analysis
sensitivity analysis
0.011998
Accuracy vs. Precision in Digital VLSI Architectures for Signal Processing · IEEE Trans. Computers 1998
Embedded and real-time systems › embedded processor
digital signal processor architecture
0.011998
Accuracy vs. Precision in Digital VLSI Architectures for Signal Processing · IEEE Trans. Computers 1998

Methods — techniques the papers use, named apart from their topics

sensitivity analysis · 0.0
YearPublicationVenuePosition
1998 Accuracy vs. Precision in Digital VLSI Architectures for Signal Processing
abstract
The paper provides a sensitivity analysis to measure the loss in accuracy induced by perturbations affecting acyclic computational flows composed of linear convolutions and nonlinear functions. We do not assume a large number of coefficients or input independence for the convolution module, nor strict requirements on the nonlinear function. The analysis is tailored to digital VLSI implementations where perturbations, associated with data quantization, affect the device inputs, coefficients, internal values, and outputs. The sensitivity analysis can be used to measure the loss in accuracy along the computational chain, to characterize the tolerated perturbations, and to dimension the whole architecture.
Cesare Alippi, Luciano Briozzo
IEEE Trans. Computers2
1994 Setting and Validating Precision Requirements in the Digital VLSI Implementation of a Neural Defect-Identifier for Machined Objects
abstract
In this paper we deal with the functional design of a dedicated digital VLSI neurochip for a real time demanding application: the identification of defects in machined parts of mechanical objects. Precision requirements analysis (in terms of the bits number to represent neural values) represents a critical point to be faced when choosing the final architecture since requirements on the chip's size may prevent parallelism exploitation. Application features and neural dynamics are thus carefully analysed to determine quasi-minimal bit requirements for the architectural components. Afterwards, once the hardware design has been defined, sensitivity analysis tools need to be applied to validate effective performances. It is shown that an accurate choice of precision requirements for hardware elements, despite poor signal to noise ratios, leads to a suitable architecture which solves the application and makes feasible the VLSI design.>
Cesare Alippi, Luciano Briozzo
ISCAS2