Regular pattern matching is pervasive in applications such as text processing, malware detection, network security, and bioinformatics. Recent studies have demonstrated specialized in-memory automata processors with superior energy and memory efficiencies than existing computing platforms. Yet, they lack efficient support for the construct of bounded repetition that is widely used in regular expressions (regexes). This paper presents BVAP, a software-hardware co-designed in-memory Bit Vector Automata Processor. It is enabled by a novel theoretical model called Action-Homogeneous Non-deterministic Bit Vector Automata (AH-NBVA), its efficient hardware implementation, and a compiler that translates regexes into hardware configurations. BVAP is evaluated with a cycle-accurate simulator in a 28nm CMOS process, achieving 67-95% higher energy efficiency and 42-68% lower area, compared to state-of-the-art automata processors (CA, eAP, and CAMA), across a set of real-world benchmarks.

Retrieval-Augmented Generation (RAG) has recently emerged as a promising solution to alleviate Large Language Model (LLM)’s deficiency in lack of knowledge. Existing RAG datasets, however, do not adequately represent the diverse and dynamic nature of real-world Question Answering (QA) tasks. To bridge this gap, we introduce the Comprehensive RAG Benchmark (CRAG), a factual question answering benchmark of 4,409 question-answer pairs and mock APIs to simulate web and Knowledge Graph (KG) search. CRAG is designed to encapsulate a diverse array of questions across five domains and eight question categories, reflecting varied entity popularity from popular to long-tail, and temporal dynamisms ranging from years to seconds. Our evaluation on this benchmark highlights the gap to fully trustworthy QA. Whereas most advanced LLMs achieve $\le 34\%$ accuracy on CRAG, adding RAG in a straightforward manner improves the accuracy only to 44%. State-of-the-art industry RAG solutions only answer 63% questions without any hallucination. CRAG also reveals much lower accuracy in answering questions regarding facts with higher dynamism, lower popularity, or higher complexity, suggesting future research directions. The CRAG benchmark laid the groundwork for a KDD Cup 2024 challenge, attracted thousands of participants and submissions. We commit to maintaining CRAG to serve research communities in advancing RAG solutions and general QA solutions. CRAG is available at https://github.com/facebookresearch/CRAG/.

Multi-pattern matching is widely used in modern software for applications requiring high throughput such as protein search, network traffic inspection, virus or spam detection. Graphics Processor Units (GPUs) excel at executing massively parallel workloads. Regular expression (regex) matching is typically performed by simulating the execution of deterministic finite automata (DFAs) or nondeterministic finite automata (NFAs). The natural implementations of these automata simulation algorithms on GPUs are highly inefficient because they give rise to irregular memory access patterns. This paper presents HybridSA, a heterogeneous CPU-GPU parallel engine for multi-pattern matching. HybridSA uses bit parallelism to efficiently simulate NFAs on GPUs, thus reducing the number of memory accesses and increasing the throughput. Our bit-parallel algorithms extend the classical shift-and algorithm for string matching to a large class of regular expressions and reduce automata simulation to a small number of bitwise operations. We have developed a compiler to translate regular expressions into bit masks, perform optimizations, and choose the best algorithms to run on the GPU. The majority of the regular expressions are accelerated on the GPU, while the patterns that exhibit random memory accesses are executed on the CPU in parallel. We evaluate HybridSA against state-of-the-art CPU and GPU engines, as well as a hybrid combination of the two. HybridSA achieves between 4 and 60 times higher throughput than the state-of-the-art CPU engine and between 4 and 233 times better than the state-of-the-art GPU engine across a collection of real-world benchmarks.

Genome analysis is a critical tool in medical and bioscience research, clinical diagnostics and treatment, and disease control and prevention. Seed and extension-based alignment is the main approach in the genome analysis pipeline, and BWA-MEM2, a widely acknowledged tool for genome alignment, performs seeding by searching for super maximal exact match (SMEM). The computation of SMEM searching requires high memory bandwidth and energy consumption, which becomes the main performance bottleneck in BWA-MEM2. State-of-the-Art designs like ERT and GenAx have achieved impressive speed-ups of SMEM-based genome alignment. However, they are constrained by frequent DRAM fetches or computationally intensive intersection calculations for all possible k-mers at every read position.

Regular expressions (regexes) are ubiquitous in modern software. There is a variety of implementation techniques for regex matching, which can be roughly categorized as (1) relying on backtracking search, or (2) being based on finite-state automata. The implementations that use backtracking are often chosen due to their ability to support advanced pattern-matching constructs. Unfortunately, they are known to suffer from severe performance problems. For some regular expressions, the running time for matching can be exponential in the size of the input text. In order to provide stronger guarantees of matching efficiency, automata-based regex matching is the preferred choice. However, even these regex engines may exhibit severe performance degradation for some patterns. The main reason for this is that regexes used in practice are not exclusively built from the classical regular constructs, i.e., concatenation, nondeterministic choice and Kleene's star. They involve additional constructs that provide succinctness and convenience of expression. The most common such construct is bounded repetition (also called counting), which describes the repetition of the pattern a fixed number of times. In this paper, we propose a new algorithm for the efficient matching of regular expressions that involve bounded repetition. Our algorithms are based on a new model of automata, which we call nondeterministic bit vector automata (NBVA). This model is chosen to be expressively equivalent to nondeterministic counter automata with bounded counters, a very natural model for expressing patterns with bounded repetition. We show that there is a class of regular expressions with bounded repetition that can be matched in time that is independent from the repetition bounds. Our algorithms are general enough to cover the vast majority of challenging bounded repetitions that arise in practice. We provide an implementation of our approach in a regex engine, which we call BVA-Scan. We compare BVA-Scan against state-of-the-art regex engines on several real datasets.

Regular pattern matching is used in numerous application domains, including text processing, bioinformatics, and network security. Patterns are typically expressed with an extended syntax of regular expressions. This syntax includes the computationally challenging construct of bounded repetition or counting, which describes the repetition of a pattern a fixed number of times. We develop a specialized in-memory hardware architecture that integrates counter and bit vector modules into a state-of-the-art in-memory NFA accelerator. The design is inspired by the theoretical model of nondeterministic counter automata (NCA). A key feature of our approach is that we statically analyze regular expressions to determine bounds on the amount of memory needed for the occurrences of bounded repetition. The results of this analysis are used by a regex-to-hardware compiler in order to make an appropriate selection of counter or bit vector modules. We evaluate our hardware implementation using a simulator based on circuit parameters collected by SPICE simulation in TSMC 28nm CMOS process. We find that the use of counter and bit vector modules outperforms unfolding solutions by orders of magnitude. Experiments concerning realistic workloads show up to 76% energy reduction and 58% area reduction in comparison to CAMA, a recently proposed in-memory NFA accelerator.

Real-time data analysis applications increasingly rely on complex streaming computations over time-series data. We propose StreamQL, a language that facilitates the high-level specification of complex analyses over streaming time series. StreamQL is designed as an algebra of stream transformations and provides a collection of combinators for composing them. It integrates three language-based approaches for data stream processing: relational queries, dataflow composition, and temporal formalisms. The relational constructs are useful for specifying simple transformations, aggregations, and the partitioning of data into key-based groups or windows. The dataflow abstractions enable the modular description of a computation as a pipeline of stages or, more generally, as a directed graph of independent tasks. Finally, temporal constructs can be used to specify complex temporal patterns and time-varying computations. These constructs can be composed freely to describe complex streaming computations. We provide a formal denotational semantics for StreamQL using a class of monotone functions over streams. We have implemented StreamQL as a lightweight Java library, which we use to experimentally evaluate our approach. The experiments show that the throughput of our implementation is competitive compared to state-of-the-art streaming engines such as RxJava and Reactor.

It is widely recognized that half-duplex-relay-aided differential decode-and-forward (DDF) cooperative transmission schemes are capable of achieving a cooperative diversity gain, while circumventing the potentially excessive-complexity and yet inaccurate channel estimation, especially in mobile environments. However, when a cooperative wireless communication system is designed to approach the maximum achievable spectral efficiency by taking the cooperation-induced multiplexing loss into account, it is not obvious whether or not the relay-aided system becomes superior to its direct-transmission based counterpart, especially, when advanced channel coding techniques are employed. Furthermore, the optimization of the transmit-interval durations required by the source and relay is an open issue, which has not been well understood in the context of half-duplex relaying schemes. Hence, we first find the optimum transmission duration, which is proportional to the adaptive channel-code rate of the source and relay in the context of Code-Rate-Optimized (CRO) TDMA-based DDF-aided half-duplex systems for the sake of maximizing the achievable network throughput. Then, we investigate the benefits of introducing cooperative mechanisms into wireless networks, which may be approached in the context of the proposed CRO cooperative system both from a pure capacity perspective and from the practical perspective of approaching the Discrete-input Continuous-output Memoryless Channel (DCMC) capacity with the aid of the proposed Irregular Distributed Differential (IrDD) coding aided scheme. In order to achieve a near-capacity performance at a low-complexity, an adaptive-window-duration based Multiple-Symbol Differential Sphere Detection (MSDSD) scheme is employed in the iterative detection aided receiver. Specifically, upon using the proposed near-capacity system design, the IrDD coding scheme devised becomes capable of performing within about 1.8 dB from the corresponding single-relay-aided DDF cooperative system's DCMC capacity.

This paper proposes a cooperative space-time coding (STC) protocol, amalgamating the concepts of asynchronous cooperation, non-coherent detection as well as Distributed Turbo Coding (DTC), where neither symbol-level time synchronization nor CSI estimation is required at any of the cooperating nodes, while attaining a high performance even at low SNRs. More specifically, a practical cooperative differential space-time spreading (CDSTS) scheme is designed with the aid of interference rejection spreading codes, in order to eliminate the effect of synchronization errors between the relay nodes without the assistance of channel estimation or equalization. Furthermore, a set of space-time codewords are constructed based on Differential Linear Dispersion Codes (DLDC), which allows our CDSTS system to support an arbitrary number of relay nodes operating at a high transmission rate due to its flexible design. Rather than using conventional single-relay-assisted DTCs, novel multi-relay-assisted DTCs and a three-stage iteratively-decoded destination receiver structure are developed. In our simulations the system parameters are designed with the aid of EXIT chart analysis, followed by the characterization of the achievable BER performance for various synchronization delay values as well as for various diversity-multiplexing relationships in frequency-selective fast and/or quasi-static Rayleigh fading environments.

It is widely recognized that differential decode-and-forward (DDF) cooperative transmission scheme is capable of providing a superior performance compared to classic direct transmissions employing differential detection, where no channel coding is used. However, the diversity gains achieved by the cooperative system become modest in practical channel coded scenarios, where the interleaving and channel coding gains dominate. Therefore, when a cooperative wireless communication system is designed to approach the maximum achievable spectral efficiency by taking the cooperation-induced multiplexing loss into account, it is not obvious, whether or not the relay-aided system becomes superior to its direct-transmission based counterpart, especially, when advanced channel coding techniques are employed. Hence in this paper the capacity of the single-relay-assisted DDF based cooperative system was studied in comparison to that of its direct-transmission based counterpart in order to answer the above-mentioned dilemma.

This paper presents an Irregular Distributed Hybrid Concatenated Differential (Ir-DHCD) coding scheme contrived for the relay-aided differential decode-and-forward (DDF) cooperative system using multiple-symbol differential sphere detection (MSDSD), where no channel estimation is required. We proposed a practical design framework for a cooperative system, which is capable of performing close to the network's corresponding non-coherent Discrete-input Continuous-output Memoryless Channel (DCMC) capacity. An adaptive-window-duration based MSDSD scheme is employed to further reduce the iterative detection complexity. Specifically, upon using the proposed near-capacity system design, the Ir-DHCD coding scheme devised becomes capable of performing within about 1.8 dB from the corresponding single-relay-aided DDF cooperative system's DCMC capacity.

In this paper, we develop a capacity-approaching Cooperative Space-Time Coding CSTC scheme employing irregular design for a twin-relay aided network as an extension of our previous work cast in the context of a half-duplex single-relay-aided network. For the sake of recovering the multiplexing loss imposed by a half-duplex three-terminal network, we employ a successive relaying protocol in this paper, where an additional relay node is activated. Hence, in order to design a near-capacity coding system, first the capacity and the achievable information-rate of a specific space-time coding aided scheme are quantified for the successive relaying aided channel. More specifically, the cooperative space-time codes employed at the source and the relays are jointly designed with the aid of EXtrinsic Information Transfer EXIT charts for the sake of high-integrity operation at Signal-to-Noise Ratios SNRs close to the corresponding successive relaying channel's capacity. Furthermore, unlike in the half-duplex single-relay based system, the destination node performs frame-by-frame Successive Interference Cancellation SIC aided iterative detection, in order to mitigate the efforts of multiple-access interference. Finally, our numerical results demonstrate that our proposed Irregular Cooperative Space-Time Coding Ir-CSTC scheme is capable of near-capacity operation in the successive relaying aided network, which is an explicit benefit of our joint source-and-relay transceiver design.

This paper presents a low complexity iteratively detected space-time transmission architecture based on Generalized Multi-Layer Space-Time (GMLST) codes and Irregular Convolutional Codes (IRCCs). The GMLST combines the benefits of the Vertical Bell-Labs LAyered Space-Time (VBLAST) scheme and Space-Time Coding (STC). The GMLST is serially concatenated with a Unity-Rate Code (URC) and an IRCC which are used to facilitate near-capacity operation with the aid of an EXtrinsic Information Transfer (EXIT) chart based design. Reduced-complexity iterative multistage Successive Interference Cancellation (SIC) is employed in the GMLST decoder, instead of the significantly more complex Maximum Likelihood (ML) detection. For the sake of approaching the maximum attainable rate, iterative decoding is invoked to achieve decoding convergence by exchanging extrinsic information across the three serial component decoders. Finally, it is shown that the SIC-based iteratively detected IRCC-URC-GMLST system is capable of providing a feasible trade-off between the affordable computational complexity and the achievable system throughput.

In this paper, an Irregular Distributed Space-Time (Ir-DST) coding scheme is studied in the context of a twin-relay aided network in which the successive relaying protocol is employed. A tight upperbound of the successive relaying aided network's capacity is given. The distributed codes at the source and relays are jointly designed with the aid of Extrinsic Information Transfer (EXIT) charts for the sake of high-integrity operation at Signal-to-Noise Ratios (SNRs) close to the corresponding network's capacity. Finally, it is shown that our proposed Ir-DST coding scheme is capable of near-capacity cooperative communications in the successive relaying aided network, which is an explicit benefit of our joint source-and-relay mode design.

In this treatise, we propose an iteratively decoded Bell-labs LAyered Space-Time (BLAST) scheme, which serially concatenates an IRregular Convolutional Code (IRCC), a UnityRate Code (URC) and a BLAST transmitter. The proposed scheme is capable of achieving a near capacity performance with the aid of our Extrinsic Information Transfer (EXIT) chart assisted design procedure. Furthermore, a Markov Chain Monte Carlo (MCMC) based BLAST scheme is employed, which is capable of significantly reducing the complexity imposed. For the sake of approaching the maximum achievable rate, iterative decoding is invoked to attain decoding convergence by exchanging extrinsic information among the three serial component decoders. Our simulation results show that the proposed MCMC-based iteratively detected IRCC-URC-BLAST scheme is capable of approaching the system capacity.

This paper presents an Irregular Distributed SpaceTime (Ir-DST) coding scheme designed for near-capacity cooperative communications. A serial concatenated scheme comprising an IRregular Convolutional Code (IRCC), a recursive Unity-Rate Code (URC) and a Space-Time Block Code (STBC) was designed for the sake of approaching the corresponding source-to-relay link capacity, where the IRCC was optimized with the aid of Extrinsic Information Transfer (EXIT) charts which was used at the source node. At the relay node, another IRCC is concatenated serially with an identical STBC. The relay's IRCC is re-optimized based on EXIT chart analysis for the sake of approaching the relay network's capacity, before transmitting the relayed information. We will demonstrate that the topology of the Ir-DST system coincides with that of a Distributed Turbo Code (DTC). At the destination node, a novel three-stage iterative decoding scheme is constructed in order to achieve decoding convergence to an infinitesimally low Bit Error Ratio (BER). Finally, it is shown that our joint source-and-relay mode design based on EXIT chart analysis is capable of near-capacity cooperative communications.

This paper presents a low complexity iteratively detected space-time transmission architecture based on generalized layered space-time (GLST) codes and irregular convolutional codes (IRCCs). The GLST combines the benefits of the vertical Bell-labs layered space-time (V-BLAST) scheme and space-time coding (STC). The GLST is serially concatenated with a unity-rate code (URC) and an IRCC which are used to facilitate near-capacity operation with the aid of an extrinsic information transfer (EXIT) chart based design. Reduced- complexity iterative successive interference cancellation (SIC) is employed in the GLST decoder, instead of the significantly more complex maximum likelihood (ML) detection. For the sake of approaching the maximum achievable rate, iterative decoding is invoked to achieve decoding convergence by exchanging extrinsic information across the three serial component decoders. Finally, it is shown that the SIC-based iteratively detected IRCC-URC-GLST system is capable of providing a trade-off between the affordable computational complexity and the system throughput.