VLDB 2026 Research / reviewers in the wild / expert
Massimo Maresca
dblp:66/5579
· DBLP profile ↗
43ranked-venue papers
15as first author
2since 2021 · last 2023
0000-0002-3049-3673ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 16 · 8 first-authorApplied, interdisciplinary, general and emerging computing · 11 · 4 first-author · 1 since 2021Databases, data management, data science and information retrieval · 5 · 2 since 2021Computer networks · 4Artificial intelligence and machine learning · 3 · 2 first-authorSoftware engineering, systems software and programming languages · 3 · 1 first-authorGraphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-authorHuman-computer interaction and ubiquitous computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
6 papers |
Interconnection networks and networks-on-chip · 25% Processor architecture and microarchitecture · 22% Parallel and multicore computing · 20% | |
| Computer networks
1 paper |
Internet architecture and protocols · 87% Routing and switching · 13% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% | |
| Computer graphics and multimedia
4 papers |
Image and video processing · 100% |
Topics — the 19 heaviest of 22, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Internet architecture and protocols
voice/data integration |
0.0 | 1 | 2004 | Internet protocol support for telephony · Proc. IEEE 2004 |
Internet architecture and protocols
voice over IP |
0.0 | 1 | 2004 | Internet protocol support for telephony · Proc. IEEE 2004 |
Compilers and program optimization
parallel program optimization |
0.0 | 1 | 2002 | On the efficiency of image and video processing programs on instruction level parallel processors · Proc. IEEE 2002 |
Processor architecture and microarchitecture
instruction-level parallelism |
0.0 | 1 | 2002 | On the efficiency of image and video processing programs on instruction level parallel processors · Proc. IEEE 2002 |
Interconnection networks and networks-on-chip
network topology |
0.0 | 3 | 1993 | Polymorphic Processor Arrays · IEEE Trans. Parallel Distributed Syst. 1993 Polymorphic-Torus Network · IEEE Trans. Computers 1989 Connected component labeling on polymorphic torus architecture · CVPR 1988 |
Performance modeling and evaluation
benchmarking |
0.0 | 1 | 1996 | Image processing on high-performance RISC systems · Proc. IEEE 1996 |
Performance modeling and evaluation
workload characterization |
0.0 | 1 | 1996 | Image processing on high-performance RISC systems · Proc. IEEE 1996 |
Routing and switching
packet switching |
0.0 | 1 | 2004 | Internet protocol support for telephony · Proc. IEEE 2004 |
Interconnection networks and networks-on-chip › network topology
torus network |
0.0 | 2 | 1989 | Polymorphic-Torus Network · IEEE Trans. Computers 1989 Polymorphic-Torus Architecture for Computer Vision · IEEE Trans. Pattern Anal. Mach. Intell. 1989 |
Parallel and multicore computing
array processor |
0.0 | 1 | 1993 | Polymorphic Processor Arrays · IEEE Trans. Parallel Distributed Syst. 1993 |
Parallel and multicore computing › array processor
mesh-connected processor array |
0.0 | 1 | 1993 | Polymorphic Processor Arrays · IEEE Trans. Parallel Distributed Syst. 1993 |
Parallel and multicore computing
parallel architecture |
0.0 | 1 | 1993 | Polymorphic Processor Arrays · IEEE Trans. Parallel Distributed Syst. 1993 |
Parallel and multicore computing › parallel architecture
massively parallel processor |
0.0 | 1 | 1989 | Polymorphic-Torus Network · IEEE Trans. Computers 1989 |
Interconnection networks and networks-on-chip › network topology
reconfigurable topology |
0.0 | 1 | 1989 | Polymorphic-Torus Architecture for Computer Vision · IEEE Trans. Pattern Anal. Mach. Intell. 1989 |
Processor architecture and microarchitecture
SIMD |
0.0 | 1 | 1989 | Polymorphic-Torus Architecture for Computer Vision · IEEE Trans. Pattern Anal. Mach. Intell. 1989 |
Interconnection networks and networks-on-chip › interconnection networks
SIMD interconnection network |
0.0 | 1 | 1989 | Polymorphic-Torus Network · IEEE Trans. Computers 1989 |
Image and video processing › binary image processing
connected component labeling |
0.0 | 1 | 1988 | Connected component labeling on polymorphic torus architecture · CVPR 1988 |
Interconnection networks and networks-on-chip › network topology
mesh network |
0.0 | 1 | 1988 | Connected component labeling on polymorphic torus architecture · CVPR 1988 |
Parallel and multicore computing
parallel programming models |
0.0 | 1 | 1993 | Polymorphic Processor Arrays · IEEE Trans. Parallel Distributed Syst. 1993 |
Methods — techniques the papers use, named apart from their topics
circuit switching · 0.0VLSI design · 0.0parallel algorithm · 0.0divide-and-conquer · 0.0complexity analysis · 0.0polymorphic switching · 0.0formal wiring analysis · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2023 | Emergency management through information crowdsourcingabstractThis article proposes a new framework to model a scenario in which First Responders, citizens, smart devices, or robots explore the environment in an emergency situation, i.e., after an earthquake, assessing damages and searching for people needing assistance. While moving, the agents observe events and exchange the information collected with other agents encountered: to this end, they use messaging systems purposely adapted to use point-to-point network connections to allow local data exchange between agents even when global network connections are not available. As is common in Delay Tolerant Networks, exchanged messages are locally stored: when a global network is available, the agents can upload all the information collected by themselves and other agents they encountered to a Control Room or a database in the Cloud. Differently from traditional DTN algorithms such as Epidemic and Spray&Wait, we propose a solution that keeps track of agents that shared information along the path and assess the quality of the information collected by multiple agents through a reputation-based mechanism that is safer than majority voting. A simulator compatible with OpenStreetMap is presented, as well as simulated experiments in two Italian towns to validate the feasibility of the approach. Lucrezia Grassi, Mario Ciranni, Pierpaolo Baglietto, Carmine Tommaso Recchiuto, Massimo Maresca, Antonio Sgorbissa |
Inf. Process. Manag. | 5 |
| 2021 | Application of the Hyperledger Fabric Blockchain in a supply and maintenance chain for critical assetsabstractThe permissioned Blockchain technology is widely proposed to improve of the integration between different companies, providing a non-intermediated infrastructure to enforce trusts within a consortium. A typical case-study for assessing the real impact of this technology is the classical “supply-chain” scenario. Pierpaolo Baglietto, Massimo Maresca, Andrea Parodi, Davide Senatori |
iiWAS | 2 |
| 2019 | A Platform for Private and Controlled Spreadsheet Objects SharingabstractSpreadsheets are widely used in industries for tabular data analysis, visualization and storage. Users often exchange spreadsheets' semi-structured data to collaborative analyze them. Recently, office suites integrated a software module that enables collaborative authoring of office files, including spreadsheets, to facilitate the sharing process. Typically spreadsheets collaborative authoring applications, like Google Sheets or Excel online, need to delocalize the entire file in public cloud storage servers. This choice is not secure for enterprise use because it exposes shared content to the risk of third party access. Moreover, available platforms usually provide coarse grained spreadsheet file sharing, where collaborators have access to all data stored inside a workbook and to all the spreadsheets' formulas used to manipulate those data. This approach limits users' possibilities to disclose only a small portion of tabular data and integrate data coming from different sources (spreadsheets or software platforms). For these reasons enterprise users prefer to control fine grained confidential data exchange and their updates manually through copy, paste, attach-to-email, extract-from-email operations. However unsupervised data sharing and circulation often leads to errors or, at the very least, to inconsistencies, data losses, and proliferation of multiple copies. We propose a model that gives business users a different level of spreadsheet data sharing control, privacy and management. Our approach enables collaborative analytics of tabular data focusing on fine grained spreadsheet data sharing instead of coarse grained file sharing. This solution works with a platform that implements an end to end encrypted protocol for sensitive data sharing that prevents third party access to confidential content. Data are never shared into public clouds but they are transferred encrypted among the administrative domains of collaborators. In this paper we describe the model and the implemented system that enable our solution. We focus on two enterprise use cases we implemented describing how we deployed our platform to speed up and optimize industry processes that involve spreadsheet usage. Giancarlo Camera, Pierpaolo Baglietto, Massimo Maresca |
EDOC | 3 |
| 2018 | Shared Access to Spreadsheet Elements for End User ProgrammingabstractSpreadsheets are the best-known form of End User Programming. End-user programmers (EUP) write programs, but not as their primary job function. They frequently develop software to perform tabular data visualization and analytics using spreadsheets and spreadsheets' formulas as a general purpose programming language. Recently spreadsheets shifted from personal office tools aimed at improving people productivity to enterprise level tools aimed at supporting distributed analytics and decisions. Distributed analytics often requires data sharing among different processes. The spreadsheet supported distributed analytics poses new challenges in spreadsheet data sharing. As in mainstream programming environments, end user spreadsheet programmers need an efficient way to handle shared data access inside spreadsheets to perform collaborative analysis of data. We propose a solution that focuses on spreadsheet element data sharing and collaboration instead of file sharing and collaboration. We present a distributed end to end encrypted tabular data sharing platform called Spreadsheet Space that supports end user programmers for fine grained spreadsheet element data sharing for collaborative analytics. Giancarlo Camera, Pierpaolo Baglietto, Massimo Maresca |
ICDCS | 3 |
| 2017 | Spreadsheet Element Sharing through SynchronizationabstractWe consider the case of spreadsheet based workgroup collaboration, in which users cooperate through spreadsheets. While spreadsheet exchange through email and shared directories is still the most common way to share data, spreadsheet sharing in the Cloud is rapidly spreading, leveraging the evolution of office tools toward delocalized system over the Cloud. In this paper we observe that spreadsheet sharing through delocalization does not support information confidentiality and introduce the concept of spreadsheet sharing through synchronization, in which both processing and storage maintain their localization in the user systems while a Cloud platform takes care of synchronization. Finally, we focus on Spreadsheet Element Synchronization in which synchronization works at the cell granularity rather than at the file granularity and show some use cases the demonstrate its superiority. Massimo Maresca, Pierpaolo Baglietto |
COMPSAC (1) | 1 |
| 2015 | Collaboration and real-time analysis in the spreadsheet spaceabstractThe SpreadSheet Space is a virtual space to connect spreadsheets. Users can configure permanent connections among spreadsheets as well as between spreadsheets and external data sources to keep their spreadsheets aligned among them and/or synchronized with external data sources. The paper focuses on two ways to exploit the Spreadsheet Space paradigm, namely Collaboration, which refers to spreadsheet alignment, and real-time data, which refers to synchronization with external data sources. Pierpaolo Baglietto, Martino Fornasa, Massimo Maresca, Michele Stecca |
iiWAS | 3 |
| 2015 | A Platform for Smart Object Virtualization and CompositionabstractOne of the most challenging objectives of the Internet of Things (IoT) domain is the identification of interaction paradigms and communication standards to integrate smart objects (SOs), i.e., physical objects able to interact with the network. Such interaction paradigms and communication protocols belong to what can be called the IoT application layer, on which this paper focuses. This paper presents app execution platform (AEP), a platform that supports the design, deployment, execution, and management of IoT applications in the domain of smart home, smart car, and smart city. AEP was designed to coherently fulfill a set of requirements covered only partially or in a fragmented way by other IoT application platforms. AEP focuses on SO virtualization and on composite application (CA) orchestration and supports dynamic object availability. Michele Stecca, Corrado Moiso, Martino Fornasa, Pierpaolo Baglietto, Massimo Maresca |
IEEE Internet Things J. | 5 |
| 2012 | SpreadComp platform: A new paradigm for distributed spreadsheet collaboration and compositionabstractA huge amount of data is everyday produced, even in many critical business sectors, in a distributed, collaborative way with the support of spreadsheet applications. The manual fusion of such data often yields errors: copy-paste operations, loss of alignment and coherency due to multiple spreadsheet Simone Mangiante, Massimo Maresca, Leonardo Roncarolo |
CollaborateCom | 2 |
| 2011 | The Click&Find Remote Vehicle Monitoring and Control platform: Architecture, interfaces, applicationsabstractThe paper presents the Click & Find platform, specifically designed to support advanced Remote Vehicle Monitoring and Control applications. The platform currently provides the real-time monitoring of over five hundreds fuel delivery tanker trucks working for many Oil Companies in Europe. The paper focuses on the innovative platform features, i.e., the three-tier architecture and the rule-based interface. Nicola Zingirian, Massimo Maresca, Carlo Valenti |
ETFA | 2 |
| 2011 | Sticky Session Support in Auto Scaling IaaS SystemsabstractWe analyze the issues related to the management of sessions in Web Applications running on Auto Scaling IaaS systems. We focus on the effect of scaling operations (i.e., dynamic addition/removal of virtual machines) on the Sticky Session paradigm provided by Web Servers. We propose two different solutions, namely Session Monitoring and Session Migration, and describe the implementation of the former in the Open Source Eucalyptus IaaS system. Michele Stecca, Luca Bazzucco, Massimo Maresca |
SERVICES | 3 |
| 2010 | An Architecture for a Mashup Container in Virtualized EnvironmentsabstractThis paper presents the architecture and the organization of a Mashup Container that supports the deployment and the execution of Event Driven Mashups (i.e., Composite Services in which the Services interact through events rather than through the classical Call-Response paradigm) following the Platform as a Service model in the Cloud Computing paradigm. We describe the two main modules of the container, namely the Deployment Module and the Service Execution Platform, and focus our attention on the performance on of the latter. In particular we discuss the results of an evaluation test that we run in a virtualized environment (VMware based) supporting scalability and fault tolerance. Michele Stecca, Massimo Maresca |
IEEE CLOUD | 2 |
| 2010 | Thread management in Mashup execution platformsabstractWe propose a Thread Management Strategy for Server Side Platforms that support the execution of Event Driven Mashups (i.e., composite services in which the service components interact through events rather than through the classical Call-Response paradigm). A Thread Management Strategy is necessary considering that such platforms are supposed to support the concurrent execution of large number of Mashups and as a consequence must exhibit high throughput and low latency. The Thread Management Strategy stems from an analysis of the interaction paradigms inside Mashups (e.g., call-response, polling, etc.). The paper describes the Thread Management Strategy and discusses its performance in the light of a set of experiments. Michele Stecca, Massimo Maresca |
iiWAS | 2 |
| 2010 | An Approach to Event Driven Services and Composite ServicesabstractThis paper presents a reference model for Event Driven Composite Services, shows how such a model can be used as a basis to design a Service Creation Platform and a Service Execution Platform and describes an example of a Composite Service that takes advantage of the model and of the platforms. The Event Driven Service Composition paradigm supports the design and the implementation of distributed applications in environments in which the services to be composed interact with external components that generate asynchronous events, as it happens, for example, in telecommunication, in factory automation, in resource monitoring, in social community interactions, in finance/administration and in many others cases. The approach proposed is in the direction of enabling people with no programming skills to design and implement services over networks, thus contributing to the diffusion of an active role of the users in service provisioning. Massimo Maresca, Michele Stecca, Pierpaolo Baglietto |
SERVICES | 1 |
| 2009 | An execution platform for event driven mashupsabstractThis paper presents a Service Execution Platform for Event Driven service compositions (a.k.a. Mashups), typically used in Telco services, and more in general applicable in domains characterized by a working principle based on asynchronous events. The platform reference model is based on an orchestration system and on a set of service proxies hosted in the Service Execution Platform. The orchestration system executes Mashup sessions, i.e., instances of service compositions activated by external events, by coordinating the actions of the service proxies and takes care of load balancing, security (AAA), and fault tolerance. The paper presents the software architecture of the platform and shows how Web Service technology can be used to support event based communication and how session-less orchestration provides support for scalability and fault tolerance. Finally the paper presents a prototype implementation of the platform and a set of experimental results. Michele Stecca, Massimo Maresca |
iiWAS | 2 |
| 2009 | Experiments and performance evaluation of Event Driven MashupsabstractIn this paper we present the results of a set of experiments aimed at measuring the performance of Event Driven Mashup orchestrators. We show four different orchestrator implementations, one based on BPEL, one based on a plain Web Service, one based on a JSLEE container and one based on a fully distributed scheme. We show that most of the orchestration activity is spent in Web Service processing, that the adoption of the BPEL platform brings the orchestrator throughput down to an unacceptable level, that the usage of the JSLEE container is not convenient if service component interaction is implemented over a Web Service infrastructure, and that the fully distributed solution exhibits lower latency, as expected, but same throughput, with respect to the plain Web Service implementation. Marc Drewniok, Massimo Maresca, Sancho Rego, Jürgen Sienel, Michele Stecca |
ISCC | 2 |
| 2009 | Passive access capacity estimation for QoS measurementabstractThe passive estimation of Internet access capacity is interesting both from a scientific perspective, because it requires the development of techniques and tools to extract such a capacity from a noisy set of traffic measurements; and from an industrial perspective, because it supports, in principle, the possibility to measure the Service Levels of IP Access Service offered by Internet service providers. This paper proposes models, techniques and tools aimed at passively estimating the maximum achievable downlink network-layer rate (capacity) of an access link to the Internet from inside a network. We propose a method that extends the well-known packet-dispersion approach to network capacity estimation by considering longer TCP packet sequences to minimize the impact of measurement noise and to obtain reliable estimation without the need of a large amount of data. The proposed approach has been validated on some small-scale experiments performed on residential ADSL lines under different interfering traffic conditions. Martino Fornasa, Massimo Maresca, Pierpaolo Baglietto, Nicola Zingirian |
IWQoS | 2 |
| 2008 | Extensive GPRS Latency Characterization in Uplink Packet Transmission from Moving VehiclesabstractThe GPRS (general packet radio service) broad availability is driving a widespread development of mobile telemetry systems for fleet management, supply chain management and dangerous goods monitoring applications. In this paper we present the results of extensive measurements of the GPRS network-layer uplink latency performed over a four-month period from about fifty road trucks using telemetry service, providing an uplink latency characterization in a moving vehicle environment. The results show the relationship between vehicle speed and latency. Furthermore, the performances of the stop-and-wait in a moving vehicle environment are evaluated in order to design a variant of such a protocol based on a vehicle speed-aware retransmission timeout. Martino Fornasa, Nicola Zingirian, Massimo Maresca |
VTC Spring | 3 |
| 2005 | Development of a service-oriented architecture for the dynamic integration of mobile remote software componentsabstractThe paper presents the work in progress of a project funded by the European Commission's aimed at enabling the integration between software components running on onboard truck terminals and ground based information systems to increase safety, efficiency and quality of road infrastructures. Despite the fact that the system originates in a automotive context, the architecture can be used for a wide range of control applications characterized by mobile software components. The system architecture goals are to collect vehicle data and make such data accessible from external information system through open application interfaces over standard wireless network technology. Martino Fornasa, Massimo Maresca, Nicola Zingirian, Lucia Ballardin, Sonia Bedin |
ETFA | 2 |
| 2005 | Stepwise deployment methodology of a service oriented architecture for business communities
Pierpaolo Baglietto, Massimo Maresca, Andrea Parodi, Nicola Zingirian |
Inf. Softw. Technol. | 2 |
| 2004 | Internet protocol support for telephonyabstractIn this paper, we consider the evolution of telephone networks from time-division multiplexing circuit switching to packet switching and, in particular, to packet switching-based on Internet Protocol (IP-supported telephony). We analyze IP-supported telephony design solutions by proposing a layered reference model in which each layer is associated to a subset of the functions that support telephony. We use the reference model to establish a terminology and a framework for the comparison of the design solutions. We group the design solutions in scenarios and compare them in terms of the reference model proposed. We then focus on IP telephony, in which IP is used in telephone company networks, and on Internet telephony, in which the Internet is used to support telephony. We show that they both can be seen as implementations of the same architecture, which consists of a set of components, associated to functions, and of the interactions among these components. We then consider the issue of voice-data integration and analyze the variety of design solutions that can be adopted to integrate voice and data. Massimo Maresca, Nicola Zingirian, Pierpaolo Baglietto |
Proc. IEEE | 1 |
| 2002 | Deployment of Service Oriented Architecture for a Business CommunityabstractThis paper describes the deployment of a service oriented architecture in the specific context of the "business communities" i.e. communities of heterogeneous actors that cooperate in the same business area. The architecture is based on XML and Web Services technologies. More specifically the paper analyzes the structure and the requirements of business communities in general, derives the requirements of the architecture and describes its implementation. Finally a case study is presented to show how the architecture has been implemented for the business community of the Port of Genoa characterized by users operating in the cargo and transport business area. Pierpaolo Baglietto, Massimo Maresca, Andrea Parodi, Nicola Zingirian |
EDOC | 2 |
| 2002 | On the efficiency of image and video processing programs on instruction level parallel processorsabstractWhile in the last decade image and video processing (IVP) have gradually moved from special purpose computer architectures based on massive parallelism (MP) to general purpose computer architectures based on instruction-level parallelism (ILP), a new challenge is now to be faced by the IVP community, namely the application of IVP also in small-size embedded systems (e.g., video players, smart cameras, digital diaries, etc.) based on ILP processors. Because of the requirements of low size, weight, and power consumption, these embedded systems do not take advantage of processors that feature advanced dynamic code optimization mechanisms such as those based on instruction reordering and register renaming. On the other hand, the compile time techniques of present generation compilers do not appear to be aggressive enough to exploit the massive parallelism of IVP tasks in ILP architectures, thus leading to inefficient programs. This paper analyzes the efficiency of IVP programs on ILP CPUs. In particular it presents: (1) a reference model for the efficient design and implementation of highly parallel programs, such as the ones of the IVP domain; (2) an analysis of the inefficiencies of IVP programs implemented on ILP processors; and (3) a set of techniques, deriving from the reference model, that overcome these inefficiencies. These techniques are based on a novel computing paradigm called bucket processing. Nicola Zingirian, Massimo Maresca |
Proc. IEEE | 2 |
| 2001 | Special issue on microprocessor architecture and compiler technology
Massimo Maresca |
Proc. IEEE | 1 |
| 2000 | Extracting fine-grain profiles of in-order executions of instruction level parallel programsabstractOptimizing compilers targeted to instruction level parallel (ILP) architectures schedule program instructions in such a way so as to minimize the number of execution stalls, called bubbles, that occur during program execution because of hazards. These bubbles are estimated by compilers on the basis of the target processor functional model. Unfortunately, these functional models are often inaccurate, especially in retargetable compilers, and thus lead the compiler to imprecise estimations. This paper presents a technique that "detects" the bubbles by observing program execution in a set of preliminary runs, instead of estimating them. The applications of this technique range from performance evaluation of programs and efficiency analysis of functional models to novel techniques of profile-driven code optimization. The paper presents the technique and shows its applicability in a case study and a set of experiments. Nicola Zingirian, Massimo Maresca |
ISPASS | 2 |
| 1999 | Efficiency of standard software architectures for Java-based access to remote databases
Nicola Zingirian, Massimo Maresca, S. Nalin |
Future Gener. Comput. Syst. | 2 |
| 1996 | Image processing on high-performance RISC systemsabstractThe recent progress of RISC technology has led to the feeling that a significant percentage of image processing applications, which in the past required the use of special purpose computer architectures or of ad hoc hardware, can now be implemented in software on low cost general purpose platforms. We decided to undertake the study described in this paper to understand the extent to which this feeling corresponds to reality. We selected a set of reference RISC-based systems to represent RISC technology, and identified a set of basic image processing tasks to represent the image processing domain. We measured the performance and studied the behavior of the reference systems in the execution of the basic image processing tasks by running a number of experiments based on different program organizations. The results of these experiments are summarized in a table, which can be used by image processing application designers to evaluate whether RISC-based platforms are able to deliver the computing power required for a specific application. Pierpaolo Baglietto, Massimo Maresca, Mauro Migliardi, Nicola Zingirian |
Proc. IEEE | 2 |
| 1996 | Scanning the Special Issue on Parallel Architectures for Image Processing
Massimo Maresca |
Proc. IEEE | 1 |
| 1995 | Parallel Implementation of the Full Search Block Matching Algorithm for Motion EstimationabstractMotion estimation is a key technique in most algorithms for video compression and particularly in the MPEG and H.261 standards. The most frequently used technique is based on a Full Search Block Matching Algorithm which is highly computing intensive and requires the use of special purpose architectures to obtain real-time performance. We propose an approach to the parallel implementation of the Full Search Block Matching Algorithm which is suitable for implementation on massively parallel architectures ranging from large scale SIMD computers to dedicated processor arrays realized in ASICs. While the first alternative can be used for the implementation of high performance coders the second alternative is particularly attractive for low cost video compression devices. This paper describes the approach proposed for the parallel implementation of the Full Search Block Matching Algorithm and the implementation of such an approach in an ASIC. Pierpaolo Baglietto, Massimo Maresca, A. Migliaro, Mauro Migliardi |
ASAP | 2 |
| 1993 | Hardware Suport for Fast Reconfigurability in Processor ArraysabstractMassively parallel computers are implemented by means of modules at different packaging levels. This paper discusses a hierarchical node clustering scheme (HNC) for packaging a class of reconfigurable processor arrays called Polymorphic Processor Array (PPA) which uses circuit-switchingbased routers at each node to deliver a different topology at every instruction. The PPA family suffers from an unknown signal delay between arbitrary two nodes connected by the circuited-switched paths. This either forces the hardware clock to compromise to the worst signal delay or makes the software dependent on the system size. The use of the HNC scheme allows to obtain communication speed-up and automatic control, at the compiler level, over signal propagation delay. Massimo Maresca, Hungwen Li, Pierpaolo Baglietto |
ICPP (1) | 1 |
| 1993 | Image component labeling on reconfigurable processor array
Massimo Maresca, Pierpaolo Baglietto, Alberto Giordano |
Microprocess. Microprogramming | 1 |
| 1993 | Polymorphic Processor ArraysabstractPolymorphic processor arrays (PPAs), two-dimensional mesh-connected arrays of processors in which each processor is equipped with a switch able to interconnect its four NEWS ports, are discussed. The main features of PPA are that it models a realistic class of parallel computers, it supports the definition of high level programming models, it supports virtual parallelism, and it supports low complexity algorithms in a number of application fields. Both the PPA computation model and the PPA programming model are presented. It is shown that the PPA computation model is realistic by relating it to the design of the polymorphic torus (PT) chip. It is also shown that the PPA programming model is scalable by demonstrating that any algorithm having O(p) complexity on a virtual PPA of size square root m* square root m, has O(k p) complexity on a PPA of size square root n* square root n, with m k n and k integers. Some application algorithms in the area of numerical analysis and graph processing are presented.> Massimo Maresca |
IEEE Trans. Parallel Distributed Syst. | 1 |
| 1991 | Transitive Closure and Graph Component Labeling on Realistic Processor Arrays Based on Reconfigurable Mesh NetworkabstractA O(log/sup 2/ n) complexity parallel algorithm is presented for graph component labeling and transitive closure on reconfigurable processor arrays. Although lower complexity algorithms for the same tasks on reconfigurable processor arrays have been proposed, the reconfigurable processor arrays supporting such algorithms have communication capabilities which are neither scalable nor suitable for VLSI implementation. On the contrary the algorithm presented is designed for a realistic class of reconfigurable processor arrays, called polymorphic processor arrays, which is both scalable and suitable for VLSI implementation.> Massimo Maresca, Pierpaolo Baglietto |
ICCD | 1 |
| 1991 | Design Considerations for a Multimedia Network Distribution Center
Riccardo Gusella, Massimo Maresca |
NOSSDAV | 2 |
| 1990 | Partitioned algorithms for gaussian elimination on reconfigurable processor arrays
Massimo Maresca, G. Carravieri, G. Cornara, Arrigo L. Frisiani |
Microprocessing and Microprogramming | 1 |
| 1989 | Connection Autonomy in SIMD Computers: A VLSI Implementation
Massimo Maresca, Hungwen Li |
J. Parallel Distributed Comput. | 1 |
| 1989 | Floating point acceleration in massively parallel architectures
Massimo Maresca, Arrigo L. Frisiani, Tullio Vernazza |
Microprocessing and Microprogramming | 1 |
| 1989 | Parallel computer vision on Polymorphic Torus architecture
Massimo Maresca, Hungwen Li, Michael M. C. Sheng |
Mach. Vis. Appl. | 1 |
| 1989 | Polymorphic-Torus Architecture for Computer VisionabstractA massively parallel fine-grained SIMD (single-instruction multi-data-stream) computer for machine vision computations is described. The architecture features a polymorphic-torus network which inserts an individually controllable switch into every node of the two-dimensional torus such that the network is dynamically reconfigurable to match the algorithm. Reconfiguration is accomplished by circuit switching and is achieved at fine-grained level. Using both the processor coordinate in the torus and the data for reconfiguration, the polymorphic-torus achieves solution time that is superior or equivalent to that of popular vision architectures such as mesh, tree, pyramid and hypercube for many vision algorithms discussed. Implementation of the architecture is given to illustrate its VLSI efficiency.> Hungwen Li, Massimo Maresca |
IEEE Trans. Pattern Anal. Mach. Intell. | 2 |
| 1989 | Polymorphic-Torus NetworkabstractAn interconnection network is presented for a massively parallel fine-grained single-instruction, multiple-data (SIMD) system, called the polymorphic-torus, whose design goal is to provide high communication bandwidth under a packaging constraint. This goal is achieved by the polymorphic principle, which injects switches with circuit-switching capability into every node of a base network (e.g. a two-dimensional torus). The polymorphic approach maintains wiring complexity of the base network but effectively increases the communication bandwidth due to its flexibility in reconfiguring the switches individually and dynamically to match the algorithm graph. Formal analysis on interpackage wiring (the flux) and the intrapackage wiring (the fluid) is given for the polymorphic-torus and the related torus networks. Three algorithms, namely, the Boolean, the max/min, and the sum operations, are developed to illustrate the use of the polymorphic principle in enhancing the communication bandwidth with no penalty of the interpackage wiring complexity.> Hungwen Li, Massimo Maresca |
IEEE Trans. Computers | 2 |
| 1988 | Connected component labeling on polymorphic torus architectureabstractA parallel algorithm is presented for labeling the connected components of multicolored digital images. The algorithm takes advantage of the bottom-up divide-and-conquer strategy applied in tree and pyramid architectures but only requires a mesh topology. To support nonlocal communication, where meshes perform poorly, the authors propose the polymorphic torus, a regular mesh interconnection network in which each node is able to dynamically interconnect its ports, depending on its own data. By having each node properly drive such an interconnection, communication links between processors get established and disconnected and, as a result, the effective network diameter is reduced. The proposed connected-component labeling algorithm requires O( square root n) steps for a square root n* square root n multicolored image of an n-processor polymorphic torus, which is the same performance achieved in a tree architecture with 2n-1 processors. The lower number of processors and the simpler topology of polymorphic torus (vs. tree) make it a very suitable approach to mesh augmentation for intermediate-level vision applications.> Massimo Maresca, Hungwen Li, Mark A. Lavin |
CVPR | 1 |
| 1988 | A VLSI implementation of polymorphic-torus architecture
Massimo Maresca, Hungwen Li |
Microprocess. Microprogramming | 1 |
| 1987 | Polymorphic-Torus Network
Hungwen Li, Massimo Maresca |
ICPP | 2 |
| 1987 | Evaluation of a multiprocessor structure for image processing
Alberto Giordano, Fausto Giunchiglia, Massimo Maresca, Tullio Vernazza |
Microprocessing and Microprogramming | 3 |