VLDB 2026 Research / reviewers in the wild / expert
Georg T. Becker
dblp:66/8380
· DBLP profile ↗
14ranked-venue papers
8as first author
1since 2021 · last 2024
0000-0002-1200-1508ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Security and privacy · 9 · 6 first-author · 1 since 2021Systems, architecture and hardware · 5 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Network and information security
7 papers |
Hardware security and side channels · 69% Cryptographic primitives and cryptanalysis · 22% Digital forensics and information hiding · 8% | |
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Reconfigurable computing and FPGAs · 67% Integrated circuit design · 33% |
Topics — the 17 heaviest of 18, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware security and side channels › hardware security primitives
physical unclonable function |
0.8 | 3 | 2019 | Robust Fuzzy Extractors and Helper Data Manipulation Attacks Revisited: Theory versus Practice · IEEE Trans. Dependable Secur. Comput. 2019 On the Pitfalls of Using Arbiter-PUFs as Building Blocks · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2015 The Gap Between Promise and Reality: On the Insecurity of XOR Arbiter PUFs · CHES 2015 |
Hardware security and side channels
hardware trojan |
0.4 | 2 | 2016 | A Design Methodology for Stealthy Parametric Trojans and Its Application to Bug Attacks · CHES 2016 Stealthy Dopant-Level Hardware Trojans · CHES 2013 |
Cryptographic primitives and cryptanalysis
fuzzy extractor |
0.4 | 1 | 2019 | Robust Fuzzy Extractors and Helper Data Manipulation Attacks Revisited: Theory versus Practice · IEEE Trans. Dependable Secur. Comput. 2019 |
Hardware security and side channels
fault attacks |
0.3 | 1 | 2018 | Bitstream Fault Injections (BiFI)-Automated Fault Attacks Against SRAM-Based FPGAs · IEEE Trans. Computers 2018 |
Hardware security and side channels › fault attacks
bug attack |
0.2 | 1 | 2016 | A Design Methodology for Stealthy Parametric Trojans and Its Application to Bug Attacks · CHES 2016 |
Hardware security and side channels › hardware security primitives › physical unclonable function
PUF security |
0.2 | 1 | 2015 | The Gap Between Promise and Reality: On the Insecurity of XOR Arbiter PUFs · CHES 2015 |
Hardware security and side channels › hardware security primitives › physical unclonable function › arbiter PUF
XOR arbiter PUF |
0.2 | 1 | 2015 | The Gap Between Promise and Reality: On the Insecurity of XOR Arbiter PUFs · CHES 2015 |
Digital forensics and information hiding
information hiding |
0.1 | 1 | 2012 | Detecting Software Theft in Embedded Systems: A Side-Channel Approach · IEEE Trans. Inf. Forensics Secur. 2012 |
Hardware security and side channels › side-channel attack
power analysis |
0.1 | 1 | 2012 | Detecting Software Theft in Embedded Systems: A Side-Channel Approach · IEEE Trans. Inf. Forensics Secur. 2012 |
Hardware security and side channels
side-channel attack |
0.1 | 1 | 2012 | Detecting Software Theft in Embedded Systems: A Side-Channel Approach · IEEE Trans. Inf. Forensics Secur. 2012 |
Digital forensics and information hiding › watermarking
software watermarking |
0.1 | 1 | 2012 | Detecting Software Theft in Embedded Systems: A Side-Channel Approach · IEEE Trans. Inf. Forensics Secur. 2012 |
Cryptographic primitives and cryptanalysis
key generation |
0.1 | 1 | 2019 | Robust Fuzzy Extractors and Helper Data Manipulation Attacks Revisited: Theory versus Practice · IEEE Trans. Dependable Secur. Comput. 2019 |
Cryptographic primitives and cryptanalysis › key generation
PUF-based key generation |
0.1 | 1 | 2019 | Robust Fuzzy Extractors and Helper Data Manipulation Attacks Revisited: Theory versus Practice · IEEE Trans. Dependable Secur. Comput. 2019 |
Cryptographic primitives and cryptanalysis › block cipher
AES |
0.1 | 1 | 2018 | Bitstream Fault Injections (BiFI)-Automated Fault Attacks Against SRAM-Based FPGAs · IEEE Trans. Computers 2018 |
Cryptographic primitives and cryptanalysis
block cipher |
0.1 | 1 | 2018 | Bitstream Fault Injections (BiFI)-Automated Fault Attacks Against SRAM-Based FPGAs · IEEE Trans. Computers 2018 |
Reconfigurable computing and FPGAs › FPGA architecture
SRAM-based FPGA |
0.1 | 1 | 2018 | Bitstream Fault Injections (BiFI)-Automated Fault Attacks Against SRAM-Based FPGAs · IEEE Trans. Computers 2018 |
Integrated circuit design
digital circuit design |
0.0 | 1 | 2013 | Stealthy Dopant-Level Hardware Trojans · CHES 2013 |
Methods — techniques the papers use, named apart from their topics
key recovery · 0.7bitstream manipulation · 0.7provable security · 0.4error correction · 0.4hardware trojan design · 0.2model building attacks · 0.2machine learning · 0.2string matching · 0.1hamming weight analysis · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | SOVEREIGN - Towards a Holistic Approach to Critical Infrastructure ProtectionabstractIn the digital age, cyber-threats are a growing concern for individuals, businesses, and governments alike. These threats can range from data breaches and identity theft to large-scale attacks on critical infrastructure. The consequences of such attacks can be severe, leading to financial losses, threats to national security, and the loss of lives. This paper presents a holistic approach to increase the security of critical infrastructures. For that, we propose an open, self-configurable, and AI-based automated cyber-defense platform that runs on specifically hardened devices and own hardware, can be deeply embedded in critical infrastructures and provides full visibility on network, endpoints, and software. In this paper, starting from a thorough analysis of related work, we describe the vision of our SOVEREIGN platform in the form of an architecture, discuss individual building blocks, and evaluate it qualitatively with respect to our requirements. Georg T. Becker, Thomas Eisenbarth 0001, Hannes Federrath, Mathias Fischer 0001, Nils Loose, Simon Ott, Joana Pecholt, Stephan Marwedel, Dominik Meyer, Jan Stijohann, Anum Talpur, Matthias Vallentin |
ARES | 1 |
| 2020 | A critical view on moving target defense and its analogiesabstractIn the last decade the Moving Target Defense (MTD) has gained popularity as a new cyber security defense paradigm. Moving Target Defense (MTD) intends to change the (presumable) information asymmetry between attacker and defender in favor of the defender by constantly changing a network's appearance as to invalidate previously acquired information. Many papers discussing MTD have been proposed and in recent years MTD techniques for a wide range of applications in enterprise networks, Cloud environments, IoT, automotive CAN buses and smart grids have been proposed. In these papers, MTD is often introduced as a "game changer" and explained with help of nice figurative analogies. Yet, how useful are these repeated changes really to deter the attacker? And even more importantly, could it not be that there are downsides to the constant changes that, ultimately, degrade security? In this position paper we argue that one needs to have a more critical and open minded view on MTD. There are MTD techniques that improve security. But we also provide several examples where they reduce security or where movement does not matter at all and is only introduced as to label a given technique as MTD. Alexander Bajic, Georg T. Becker |
CF | 2 |
| 2020 | dPHI: An improved high-speed network-layer anonymity protocolabstractAbstract The Internet infrastructure has not been built with security or privacy in mind. As a result, an adversary who has control over a single Autonomous System can set-up mass surveillance systems to gather meta data by passively collecting the headers of the messages they route. To solve this problem, lightweight anonymous routing protocols such as LAP, DOVETAIL and most recently PHI have been proposed which are efficient enough to be deployed in a large scale infrastructure such as the Internet. In this paper we take a closer look at PHI and introduce several de-anonymization attacks malicious nodes can perform to reduce the sender and receiver anonymity. As a direct consequence of this analysis we propose a new protocol called dependable PHI (dPHI). The security analysis of dPHI includes a detailed quantitative anonymity analysis that compares dPHI with PHI, LAP and HORNET. Together with the performance analysis, this allows for a good comparison of trade-offs for these anonymity protocols. Alexander Bajic, Georg T. Becker |
Proc. Priv. Enhancing Technol. | 2 |
| 2019 | Breaking the Lightweight Secure PUF: Understanding the Relation of Input Transformations and Machine Learning Resistance
Nils Wisiol, Georg T. Becker, Marian Margraf, Tudor A. A. Soroceanu, Johannes Tobisch, Benjamin Zengin |
CARDIS | 2 |
| 2019 | Robust Fuzzy Extractors and Helper Data Manipulation Attacks Revisited: Theory versus PracticeabstractFuzzy extractors have been proposed in 2004 by Dodis et al. as a secure way to generate cryptographic keys from noisy sources. In recent years, fuzzy extractors have become an important building block in hardware security due to their use in secure key generation based on Physical Unclonable Functions (PUFs). Fuzzy extractors are provably secure against passive attackers. A year later Boyen et al. introduced robust fuzzy extractors which are also provably secure against active attackers, i.e., attackers that can manipulate the helper data. In this paper we show that the original provable secure robust fuzzy extractor construction by Boyen et al. actually does not fulfill the error-correction requirements for practical PUF applications. The fuzzy extractors proposed for PUF-based key generation on the other hand that fulfill the error-correction requirements cannot be extended to such robust fuzzy extractors, due to a strict bound t on the number of correctable errors. While it is therefore tempting to simply ignore this strict bound, we present novel helper data manipulation attacks on fuzzy extractors that also work if a “robust fuzzy extractor-like” construction without this strict bound is used. Hence, this paper can be seen as a call for action to revisit this seemingly solved problem of building robust fuzzy extractors. The new focus should be on building more efficient solutions in terms of error-correction capability, even if this might come at the costs of a proof in a weaker security model. Georg T. Becker |
IEEE Trans. Dependable Secur. Comput. | 1 |
| 2018 | Bitstream Fault Injections (BiFI)-Automated Fault Attacks Against SRAM-Based FPGAsabstractThis contribution is concerned with the question whether an adversary can automatically manipulate an unknown FPGA bitstream realizing a cryptographic primitive such that the underlying secret key is revealed. In general, if an attacker has full knowledge about the bitstream structure and can make changes to the target FPGA design, she can alter the bitstream leading to key recovery. However, this requires challenging reverse-engineering steps in practice. We argue that this is a major reason why bitstream fault injection attacks have been largely neglected in the past. In this paper, we show that malicious bitstream modifications are i) much easier to conduct than commonly assumed and ii) surprisingly powerful. We introduce a novel class of bitstream fault injection (BiFI) attacks which does not require any reverse-engineering. Our attacks can be automatically mounted without any detailed knowledge about either the bitstream format or the design of the crypto primitive which is being attacked. Bitstream encryption features do not necessarily prevent our attack if the integrity of the encrypted bitstream is not carefully checked. We have successfully verified the feasibility of our attacks in practice by considering several publicly available AES designs. As target platforms, we have conducted our experiments on Spartan-6 and Virtex-5 Xilinx FPGAs. Pawel Swierczynski, Georg T. Becker, Amir Moradi 0001, Christof Paar |
IEEE Trans. Computers | 2 |
| 2017 | A fair and comprehensive large-scale analysis of oscillation-based PUFs for FPGAsabstractPhysical Unclonable Functions (PUFs) have gained a lot of research attention in recent years resulting in many different PUF proposals. Several of these proposals were aimed specifically at FPGA implementations. However, often these PUFs are evaluated and implemented for different (and often old) FPGA families with different metrics. Missing implementation details in many papers further hamper a fair analysis, as small details such as the exact routing can have significant impact on the PUF performance. In this paper we aim to overcome these problems by providing a fair comparison of some of the most promising Weak PUFs for FPGAs, the classic Ring Oscillator PUF (RO PUF), the Loop PUF and the TERO PUF. Each PUF is implemented with the same area optimizations and careful manual routing for modern Xilinx Artix-7 FPGAs and several implementation options are discussed. We measure the reliability and uniqueness of the PUF constructs on 100 BASYS-3 boards for a temperature range of -22°C to 44°C and use a glitch-generating core to analyze the vulnerability of the PUF constructs to surrounding logic. Our results show that the RO PUF has the best reliability in the presence of temperature variations while TERO has the best uniqueness of the three considered PUFs. Interestingly, the TERO PUF also shows the highest resistance to surrounding logic. To encourage further research in FPGA PUFs and to enable a fair comparison to future work the implementations as well as the measurement data will be made publicly available. Alexander Wild, Georg T. Becker, Tim Güneysu |
FPL | 2 |
| 2016 | A Design Methodology for Stealthy Parametric Trojans and Its Application to Bug Attacks
Samaneh Ghandali, Georg T. Becker, Daniel E. Holcomb, Christof Paar |
CHES | 2 |
| 2015 | The Gap Between Promise and Reality: On the Insecurity of XOR Arbiter PUFs
Georg T. Becker |
CHES | 1 |
| 2015 | On the Pitfalls of Using Arbiter-PUFs as Building BlocksabstractPhysical unclonable functions (PUFs) have emerged as a promising solution for securing resource-constrained embedded devices such as RFID tokens. PUFs use the inherent physical differences of every chip to either securely authenticate the chip or generate cryptographic keys without the need of nonvolatile memory. However, PUFs have shown to be vulnerable to model building attacks if the attacker has access to challenge and response pairs. In these model building attacks, machine learning is used to determine the internal parameters of the PUF to build an accurate software model. Nevertheless, PUFs are still a promising building block and several protocols and designs have been proposed that are believed to be resistant against machine learning attacks. In this paper, we take a closer look at two such protocols, one based on reverse fuzzy extractors and one based on pattern matching. We show that it is possible to attack these protocols using machine learning despite the fact that an attacker does not have access to direct challenge and response pairs. The introduced attacks demonstrate that even highly obfuscated responses can be used to attack PUF protocols. Hence, this paper shows that even protocols in which it would be computationally infeasible to compute enough challenge and response pairs for a direct machine learning attack can be attacked using machine learning. Georg T. Becker |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 2013 | Stealthy Dopant-Level Hardware Trojans
Georg T. Becker, Francesco Regazzoni 0001, Christof Paar, Wayne P. Burleson |
CHES | 1 |
| 2012 | Detecting Software Theft in Embedded Systems: A Side-Channel ApproachabstractSource code plagiarism has become a serious problem for the industry. Although there exist many software solutions for comparing source codes, they are often not practical in the embedded environment. Today's microcontrollers have frequently implemented a memory read protection that prevents a verifier from reading out the necessary source code. In this paper, we present three verification methods to detect software plagiarism in embedded software without knowing the implemented source code. All three approaches make use of side-channel information that is obtained during the execution of the suspicious code. The first method is passive, i.e., no previous modification of the original code is required. It determines the Hamming weights of the executed instructions of the suspicious device and uses string matching algorithms for comparisons with a reference implementation. In contrast, the second method inserts additional code fragments as a watermark that can be identified in the power consumption of the executed source code. As a third method, we present how this watermark can be extended by using a signature that serves as a proof-of-ownership. We show that particularly the last two approaches are very robust against code-transformation attacks. Georg T. Becker, Daehyun Strobel, Christof Paar, Wayne P. Burleson |
IEEE Trans. Inf. Forensics Secur. | 1 |
| 2011 | Implementing hardware Trojans: Experiences from a hardware Trojan challengeabstractHardware Trojans have become a growing concern in the design of secure integrated circuits. In this work, we present a set of novel hardware Trojans aimed at evading detection methods, designed as part of the CSAW Embedded System Challenge 2010. We introduced and implemented unique Trojans based on side-channel analysis that leak the secret key in the reference encryption algorithm. These side-channel-based Trojans do not impact the functionality of the design to minimize the possibility of detection. We have demonstrated the statistical analysis approach to attack such Trojans. Besides, we introduced Trojans that modify either the functional behavior or the electrical characteristics of the reference design. Novel techniques such as a Trojan draining the battery of a device do not have an immediate impact and hence avoid detection, but affect the long term reliability of the system. Georg T. Becker, Ashwin Lakshminarasimhan, Lang Lin, Sudheendra Srivathsa, Vikram B. Suresh, Wayne P. Burleson |
ICCD | 1 |
| 2010 | Secure Location Verification - A Security Analysis of GPS Signal Authentication
Georg T. Becker, Sherman C. Lo, David S. De Lorenzo, Per K. Enge, Christof Paar |
DBSec | 1 |