In this work, we present two new oscillator structures based on using two amplifiers surrounded by four impedances Z1−4. The structures are generic in the sense that they are not based on any specific active device and hence can be realized in numerous different ways. We focus our attention on deriving all possible canonical second-order RC and LC oscillators that can be obtained from each of the proposed structures. In some of the found circuits, the oscillation frequency can be independently tuned using one of the two amplifiers while the start-up condition is set by the other amplifier. Spice circuit simulations and experimental results are provided to validate the theory.

In this work, we show that a pinched-loop can be observed in the voltage-current plane when a series R-L circuit is current excited. Specifically, the resistance (R) in this circuit is variable and is voltage-controlled by the voltage developed across the inductor due to the exciting current. In this context, we confirm our previous results that the pinched-loop is not a characteristic of memrsitors or memrsitive systems and that it can be observed in many other nonlinear systems. Numerical simulations, circuit simulations and experimental results validate the theory.

Fractional-order complementary filter topologies, which could be employed in various sensor applications, are presented in this paper. The core of the implementation is a fractional-order low-pass filter, while its complementary counterpart is derived through the substitution of the output of the low-pass filter with the input signal. Thanks to the utilization of current-mode signal processing, the summation operation needed for establishing the output of the complete filter is easily implemented.

Fractional-order shelving filter designs, which are used for preserving the spectral balance of the human sound perception, are introduced in this work. The main attractive offered benefit is originated from the fact that fractional-order filters offer an extra degree of freedom with regards to the slope of the stop-band attenuation, allowing an improvement in the listening experience. The implementation of the filters is performed through the utilization of the partial fraction expansion of the rational integer-order transfer functions which approximate their fractional-order counterparts. The employment of Operational Transconductance Amplifiers as active elements offers the advantage of full electronic control of the implemented filters characteristics.

A simple realization of the fractional-order Mihalas-Niebur neuron model is presented in this work. The required low-pass filter is implemented using current-mirrors offering simple circuitry and, also, electronic tunability of the realized time-constant. Due to the limited bandwidth required for this application, the necessary fractional-order capacitor is realized using an appropriately configured second-order RC network. The proposed realization highlights the connection between the fractional-order and the frequency spiking of the model through appropriate simulation results, which are derived via the Analog Design Environment of Cadence software, using MOS transistor models provided by the AMS 0.35μm process.

This paper deals with a fractional-order DC motor controller implementation, which is constructed from operational transconductance amplifiers and capacitors. In addition, for the electronic tuning capability and potential of implementation in monolithic form, the proposed structure offers significant reduction of the active components count. This is achieved through a manipulation of the transfer function of the controller integrator function in such a way that only fractional-order differentiation stage is required. An illustrative simulation example with the above mentioned benefit is presented.

The low-voltage low-power sinh-domain (SD) implementations of integer- and fractional-order FitzHugh-Nagumo (FHN) neuron model have been introduced in this paper. Besides, the effect of fractional-orders on the external excitation current and dynamics of the neuron has been examined in this paper. The proposed SD designs of FHN neuron model have the benefits of: 1) low-voltage operation; 2) integrability, due to resistor-less design and the employment of only grounded components; 3) electronic tunability of performance parameters; and 4) low-power implementation due to the inherent properties of SD technique. HSPICE simulator tool and Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan 130-nm CMOS process was used to evaluate and verify the correct functioning of the model. In addition, to experimentally verify the operation of the proposed fractional-order FHN neuron model, field-programmable analog array (FPAA) implementation of the model has been presented, and the proper functioning of the model has been verified. To the best of the authors' knowledge, this is the first paper that describes the electronic realization of the fractional-order FHN neuron model. In addition, it is the first time that the FPAA implementation of any fractional-order neuron model has been presented.

Fractional-order differentiation and integration stages are essential building blocks for performing signal processing using fractional-order calculus. One important characteristic of fractional-order differentiators/integrators is the circuit complexity of the integer-order topologies required for approximating such stages. The already introduced schemes suffer from this obstacle, making the derived structures power demanding. A simple structure, constructed from 21 MOS transistors and 3 dc current sources, which is capable of approximating fractional-order differentiators and integrators is presented in this paper. Other attractive benefits of the proposed scheme are the electronic tuning capability as well as the capability for implementation in monolithic form. The evaluation of its behavior is performed using Cadence and the Design Kit provided by the Austrian Mikro Systems (AMS) 0.35μm CMOS process.

A fractional-order model of the B&K type 4185 commercial ear simulator is introduced in this work. It is constructed from a series connection of an integer-order inductor and a fractional-order capacitor. The proposed model is much simpler than its corresponding integer-order counterpart and can easily be implemented using Operational Transconductance Amplifiers (OTAs) and grounded capacitors in a fully resistor-less structure. The proposed realization also offers electronic tuning capability of its characteristics through the adjustment of appropriate dc currents and is realizable in fully integrated form. Evaluation of the behavior of the proposed model is performed using Cadence and the Design Kit provided by the Austrian Micro Systems 0.35μm CMOS process.

Designs of switched-current fractional-order filters are presented in this paper. The derivation of the filters is performed through a transposition of the Functional Block Diagram of the continuous-time prototype filter into discrete-time domain using the bilinear s-to-z transformation. Fully differential bilinear integrators have been employed in order to facilitate the realization of the required current inversions. The correct operation of the proposed design method has been verified through simulation in the cases of (1+a) and (3+a) order lowpass filters.

Fractional-order filter realizations with Chebyshev characteristics, approximated by appropriate integer-order topologies, are realized in this work. The employed active blocks were current-mirrors and the derived filters offer the following attractive characteristics: capability of operating in a low-voltage environment, circuit simplicity and resistor-less realization. In addition, a digitally controlled current division network is employed to perform electronic adjustment of the cut-off frequency as well as the order of the filters. The performance of the proposed fractional-order filters is evaluated through the Analog Design Environment of the Cadence software and the Design Kit provided by the AMS 0.35μm CMOS process. The obtained simulation results for orders 1.2, 1.5, and 1.8 confirm that both pass-band and stop-band characteristics of the filters are preserved, while the transition from pass-band to stop-band is performed in fractional-order steps.

Novel topologies suitable for realizing wavelet filter functions are presented in this paper. The utilization of current mirrors as active elements offers the advantages of resistorless topologies with electronic adjustment capability of their frequency characteristics and supply voltage minimization. The efficiency of the proposed filters has been verified through simulation results by employing TSMC 130nm CMOS process, where the most important performance factors have been considered.

Complex signal processing is an attractive technique for removing the image signals that appear in transceiver architectures. The realization of complex filters is achieved by employing an appropriate transformation to the corresponding conventional real filters. A novel complex filter topology realized by employing current mirrors as active elements is introduced in this paper. Attractive characteristics are the capability of low-voltage operation, the electronic tuning of its frequency response and the absence of passive resistors. A 12th-order complex filter has been designed in order to meet the Bluetooth and ZigBee standard requirements. The performance of the filter has been evaluated through simulation results by employing AMS 0.35μm CMOS process, where the most important performance factors have been considered.

Improved log-domain blocks for obtaining the equivalents of passive elements according to the concept of linear transformation filtering are presented in this paper. The offered benefits, in comparison to the already introduced filter structures, are that the dc offset current presented at the output of the all pole filters and the dc instability, observed in the case of the filters where LC resonators are substituted, are now eliminated. The correct operation of the proposed blocks has been verified through simulation results