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VLDB 2026 Research / reviewers in the wild / expert

M. T. McMahon

dblp:68/4032 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 1982
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test
design for testability		 0.011982
Electronic Chip-in-Place Test · DAC 1982
Electronic design automation
hardware verification and test		 0.011982
Electronic Chip-in-Place Test · DAC 1982
Electronic design automation › hardware verification and test
VLSI testing		 0.011982
Electronic Chip-in-Place Test · DAC 1982
YearPublicationVenuePosition
1982 Electronic Chip-in-Place Test
abstract
Electronic Chip-in-Place Test (ECIPT) is a design approach and a test methodology for VLSI packages containing multiple semi-conductor chips.
Prabhakar Goel, M. T. McMahon
 DAC2
1982 Electronic Chip-In-Place Test
Prabhakar Goel, M. T. McMahon
 ITC2