Vehicular Ad Hoc Networks (VANETs) are attracting the attention of researchers, industry, and governments for their potential of significantly increasing the safety level on the road. In order to understand whether VANETs can actually realize this goal, in this paper we analyze the dynamics of multi-hop emergency message dissemination in VANETs. Under a probabilistic wireless channel model that accounts for interference, we derive lower bounds on the probability that a car at distance d from the source ofthe emergency message correctly receives the message within time t. Besides d and t, this probability depends also on 1-hop channel reliability, which we model as a probability value p, and on the message dissemination strategy. Our bounds are derived for an idealized dissemination strategy which ignores interference, and for two provably near-optimal dissemination strategies under protocol interference. The bounds derived in the first part of the paper are used to carefully analyze the tradeoff between the safety level on the road (modeled by parameters d and t), and the value of 1-hop message reliability p. The analysis of this tradeoff discloses several interesting insights that can be very useful in the design of practical emergency message dissemination strategies.

Both the bottleneck counting argument and Razborov's approximation method have been used to prove exponential lower bounds for monotone circuits. We show that under the monotone circuit model for every proof by the approximation method, there is a bottleneck counting proof and vice versa. We also illustrate the elegance of the bottleneck counting technique with a simple self-explained example: the proof of a (previously known) lower bound for the 3-CLIQUE/sub n/ problem by the bottleneck counting argument.

Self-stabilizing systems have been proposed as a desirable method of achieving fault tolerance. They are guaranteed to eventually eliminate any initial set of errors. This also implies that infrequent errors can be dealt with. For more details see [1-7]. In this paper we study deterministic self-stabilizing algorithms for leader election in rings. We have two sets of contributions. First, we introduce the formal definition of an observer at each location: a local process that can detect correctness, but cannot influence the protocol. Every self-stabilizing algorithm can have such associated observers. We believe that this is a good abstraction. We also claim that some such notion is necessary to make self-stabilizing protocols useful. The notion of an observer suggests a natural question to anyone familiar with the P vs. NP question: are there situations in which it is easier to detect stability than to achieve it? We exhibit a somewhat contrived problem where this is indeed the case. ...

We prove that polynomial time bounded RAMs with the instruction set [shift, +, X, boolean ] accept exactly the languages in PSPACE. This generalizes previous results: [5] showed the same for the instruction set that does not include multiplication, [5] and [7] proved the weaker theorems, that RAMs (and even PRAMs) with this instruction set could be simulated in EXPTAPE. The PRAM result is a simple corollary to our theorems. We also introduce other powerful string-manipulating instructions for RAMs, show a nontrivial simulation of Turing machines by these RAMs, and show that in a sense such simulations are optimal.

Article Free Access Share on Investigations of fault-tolerant networks of computers Authors: Piotr Berman Department of Computer Science, The Pennsylvania State University Department of Computer Science, The Pennsylvania State UniversityView Profile , J'anos Simon Department of Computer Science, The University of Chicago Department of Computer Science, The University of ChicagoView Profile Authors Info & Claims STOC '88: Proceedings of the twentieth annual ACM symposium on Theory of computingJanuary 1988 Pages 66–77https://doi.org/10.1145/62212.62219Online:01 January 1988Publication History 10citation258DownloadsMetricsTotal Citations10Total Downloads258Last 12 Months16Last 6 weeks2 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF

We take a complexity theoretic view of A. C. Yao's theory of communication complexity. A rich structure of natural complexity classes is introduced. Besides providing a more structured approach to the complexity of a variety of concrete problems of interest to VLSI, the main objective is to exploit the analogy between Turing machine (TM) and communication complexity (CC) classes. The latter provide a more amicable environment for the study of questions analogous to the most notorious problems in TM complexity. Implicitly, CC classes corresponding to P, NP, coNP, BPP and PP have previously been considered. Surprisingly, pcc = Npcc ∩ coNPcc is known [AUY]. We develop the definitions of PSPACEcc and of the polynomial time hierarchy in CC. Notions of reducibility are introduced and a natural complete member in each class is found. BPPcc ⊆ Σ2cc ∩ Π2cc [Si2] remains valid. We solve the question that BPPcc ⊉ NPcc by proving an Ω(√n) lower bound for the bounded-error complexity of the coNPcc- complete problem "disjointness". Similar lower bounds follow for essentially any nontrivial monotone graph property. Another consequence is that the deterministically exponentially hard "equality" relation is not NPcc-hard with respect to oracle-protocol reductions. We prove that the distributional complexity of the disjointness problem is O(√n log n) under any product measure on {0, 1}n × {0, 1}n. This points to the difficulty of improving the Ω(√n) lower bound for the B2PP complexity of "disjointness". The variety of counting and probabilistic classes appears to be greater than in the Turing machine versions. Many of the simplest graph problems (undirected reachability, planarity, bipartiteness, 2-CNF-satisfiability) turn out to be PSPACEcc-hard. The main open problem remains the separation of the hierarchy, more specifically, the conjecture that Σ2cc ≠ Π2cc. Another major problem is to show that PSPACEcc and the probabilistic class UPPcc are not comparable.

Article Continuous routing and batch routing on the hypercube Share on Authors: Yukon Chang Department of Computer Science, Pennsylvania State University Department of Computer Science, Pennsylvania State UniversityView Profile , Janos Simon Department of Computer Science, University of Chicago Department of Computer Science, University of ChicagoView Profile Authors Info & Claims PODC '86: Proceedings of the fifth annual ACM symposium on Principles of distributed computingNovember 1986 Pages 272–281https://doi.org/10.1145/10590.10614Published:01 November 1986 7citation177DownloadsMetricsTotal Citations7Total Downloads177Last 12 Months3Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access

The attribute grammar technique used for design of structure editors is suggested as a foundation for building hierarchical incremental design editors for VLSI circuits. The usual definition of attribute grammars is extended: the cycles that occur in VLSI design make us come to terms with circular attributes (under conditions that guarantee their least fixpoint solution, namely that the functions be monotone and yield values over a lattice of bounded height). Many interesting VLSI design problems can be cast in attributes meeting this condition, for example, timing verification, logic simulation, power dissipation, and adherence to clocking disciplines, to name a few. As an illustration of the formalism, attributes are presented which solve the All Bidirectional Edges problem that labels the direction of information flow in a circuit. The incremental evaluation algorithm of [Rep82] is extended to handle fixpoint computations of circular attributes by noting that when the dependency graph is broken into its strongly connected components, a directed acyclic graph results. The worst-case running time of the resulting incremental evaluation algorithm is bounded by O (hk |AFFECTEDSCC|), where h is the height of the largest attribute lattice, k the largest number of attributes in any one strongly connected component, and |AFFECTEDSCC| the number of strongly connected components affected by a single modification to the design tree.

We study VLSI solutions to the connected component problem on networks that have area too small to store all the edges of the graph for the entire computation. We give lower bounds on the time needed to solve this problem on such networks, as well as an optimal algorithm. The lower bounds use a new proof technique combining adversary strategy, information flow, and Kolmogorov complexity arguments. The lower bounds obtained for the connected components problem hold for a number of other undirected graph problems.

We study (unbounded error) probabilistic communication complexity. Our new results include -one way and two complexities differ by at most 1 - certain functions like equality and the verification of Hamming distance have upper bounds that are considerably better than their counterparts in deterministic, nondeterministic, or bounded error probabilistic model - there exists a function which requires /spl Omega/(logn) information transfer. As an application, we prove that a certain language requires /spl Omega/(nlogn) time to be recognized by a 1-tape (unbounded error) probabilistic Turing machine. This bound is optimal. (Previous lower bound results [Yao 1] require acceptance by bounded error computation. We believe that this is the first nontrivial lower bound on the time required by unrestricted probabilistic Turing machines.

We study four kinds of protocols in distributed computing. Besides the case of deterministic protocols, we consider random, nondeterministic and probabilistic models. We show a strict containment relationship with exponential gaps. We also explore in some depth the relationship between one-way and two-way communications. It is shown, for example, that the complexity classes of random one-way protocols and of deterministic two-way protocols are incomparable: exponential gaps exist in either direction. On the other hand there is no difference between the complexity of one-way and two-way communications in the nondeterministic case.

It is likely that reliable and fast space-bounded probabilistic acceptors are less powerful than nondeterministic ones. We consider a restricted model of space-bounded probabilistic computation, the random analog of a model studied in [CR]. We show that maze traversal (a complete problem for nondeterministic space log n) requires space Ω(log2n/loglogn) by random machines, even if 'fast' is relaxed to mean only 'subexponential'. In particular, the lower bound on space holds for the time complexity of Savitch's algorithm (which can be simulated in the model).

We study probabilistic on-line simulators for several machine models (or memory structures). The simulators have a more constrained access to data than the virtual machines, but are allowed to use probabilistic means to improve average access time. We show that in many cases coin tosses can not make up for inadequate access.

This paper studies two aspects of the power of space-bounded probabilistic Turing machines. Section 2 presents a simple alternative proof of Simon's recent result [13] that space-bounded probabilistic complexity classes are closed under complement. Section 3 demonstrates that any language in the log n space hierarchy can be recognized by an log n space-bounded probabilistic Turing machine with small error; this is a generalization of Gill's result that any language in NSPACE(log n) can be recognized by such a machine

We present efficient $(O(\log ^2 n))$ parallel algorithms for two classical graph problems: planarity testing and finding triconnected components. The algorithms use only a polynomial number of processors. Previous algorithms used $\Omega (n)$ operations, regardless of the number of available processors.

For tape constructible functions S(n)≥log n, if a language L is accepted by an S(n) tape bounded probabilistic Turing machine, then there is an S(n) tape bounded probabilistic Turing machine that accepts L, the complement of L.

Static, descriptional complexity (program size) [16, 9] can be used to obtain lower bounds on dynamic, computational complexity (such as running time). We describe and discuss this “information-theoretic approach” in the following section. Paul introduced it in [13], to obtain restricted lower bounds on the time complexity of sorting. We use the approach here to obtain lower time bounds for on-line simulation of one abstract storage unit by another. A major goal of our work is to promote the approach.

We study the power of RAM acceptors with several instruction sets. We exhibit several instances where the availability of the division operator increases the power of the acceptors. We also show that in certain situations parallelism and stochastic features ('distributed random choices') are provably more powerful than either parallelism or randomness alone. We relate the class of probabilistic Turing machine computations to random access machines with multiplication (but without boolean vector operations). Again, the availability of integer division seems to play a crucial role in these results.

The tape requirements of probabilistic and deterministic Turing machine transducers are polynomially related.

We study complexity problems associated with generation and manipulation of integers. We show that many such questions may be formulated as problems about random access machines (RAMs), and recent results about RAMs with special instructions sets can be used to give estimates about the complexity of the manipulations. Finally we settle an open problem about RAMs (which becomes more interesting in this setting), namely the power of unrestricted vector machines, studied in [5] [6] [2]. We prove that allowing arbitrary shifts (instead of bounded shifts) gives at most a polynomial reduction in the time necessary to recognize languages by vector machines, thus solving the main problem left unanswered by the papers of Pratt and Stockmeyer [5], [6] and Hartmanis and Simon [2], [3]. Equivalently, it is possible to compare two integers, each obtained by a sequence of at most n operations of shift, sum, and boolean vector operations, within tape polynomial in n.