Performance studies, linking ATM switch capabilities to physical limitations imposed by integrated circuit technology, have been scarce. This paper explores trends in circuit capabilities, and makes projections toward the 0.25-/spl mu/m technologies that will be available to all switch designers in the year 2000. The limits imposed by circuit technology are applied to shared buffer ATM switches. We determine requirements and physical limits for buffer capacity, buffer throughput, chip I/O throughput, and power dissipation. As a result, we are able to project chip counts, aggregate switch throughputs, and switch dimensions. As well, performance capabilities of single-chip shared buffer switches are estimated. A single-chip shared buffer switch implemented in 0.25-/spl mu/m technology will be capable of an aggregate throughput of 1.3 Tb/s, will accomplish almost arbitrarily low cell loss rates for bursty traffic, and may be integrated together with translation tables supporting hundreds of connections per port.

Asynchronous transfer mode (ATM) has been designated as the switching environment for future broadband integrated services digital networks (BISDN) networks and services. Although input-buffered space switches are more economical and simpler to implement than output-buffered space switches, they suffer from external blocking because of destination port contention. We review contention resolution methods used to avoid external blocking, and choose a solution based on ring reservation, resulting in an elegant and efficient mechanism requiring only nearest-neighbor communications. In addition to external blocking, space switches suffer from head-of-line (HOL) blocking, and our technique alleviates HOL blocking without arbitration time overhead. This method makes use of a novel content addressable first in/first out (CAFIFO) to achieve single-cycle windowing, and the CAFIFO design and operation are described in detail. High multicast throughput is achieved by employing call-splitting. Multiple latency priorities can also be supported. Simulation results, for both unicast and multicast switching, and both random and bursty traffic, highlight the versatility and excellent performance of the CAFIFO-based switch.