VLDB 2026 Research / reviewers in the wild / expert
John Havlicek
dblp:69/623
· DBLP profile ↗
12ranked-venue papers
4as first author
0since 2021 · last 2014
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Theory of computation · 9 · 3 first-authorSystems, architecture and hardware · 3 · 1 first-authorSoftware engineering, systems software and programming languages · 3 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Theoretical computer science
7 papers |
Logic in computer science · 39% Distributed computing theory · 29% Automated reasoning and model checking · 24% | |
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 40% Memory systems · 30% Distributed systems · 30% |
Topics — the 17 heaviest of 18, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Logic in computer science
temporal logic |
0.1 | 3 | 2005 | A topological characterization of weakness · PODC 2005 The Definition of a Temporal Clock Operator · ICALP 2003 Reasoning with Temporal Logic on Truncated Paths · CAV 2003 |
Automated reasoning and model checking
model checking |
0.1 | 2 | 2003 | Reasoning with Temporal Logic on Truncated Paths · CAV 2003 Virtual Symmetry Reduction · LICS 2000 |
Distributed computing theory › concurrent objects
wait-free algorithms |
0.1 | 2 | 2004 | A Note on the Homotopy Type of Wait-Free Atomic Snapshot Protocol Complexes · SIAM J. Comput. 2004 Computable Obstructions to Wait-free Computability · FOCS 1997 |
Computational complexity
verification complexity |
0.1 | 1 | 2006 | Some Complexity Results for SystemVerilog Assertions · CAV 2006 |
Logic in computer science
semantics |
0.1 | 1 | 2005 | A topological characterization of weakness · PODC 2005 |
Logic in computer science
topological characterization |
0.1 | 1 | 2005 | A topological characterization of weakness · PODC 2005 |
Distributed computing theory › distributed computability
protocol complex |
0.0 | 1 | 2004 | A Note on the Homotopy Type of Wait-Free Atomic Snapshot Protocol Complexes · SIAM J. Comput. 2004 |
Distributed computing theory › concurrent objects
snapshot objects |
0.0 | 1 | 2004 | A Note on the Homotopy Type of Wait-Free Atomic Snapshot Protocol Complexes · SIAM J. Comput. 2004 |
Distributed computing theory
topological methods in distributed computing |
0.0 | 1 | 2004 | A Note on the Homotopy Type of Wait-Free Atomic Snapshot Protocol Complexes · SIAM J. Comput. 2004 |
Logic in computer science › temporal logic
temporal logic reasoning |
0.0 | 1 | 2003 | Reasoning with Temporal Logic on Truncated Paths · CAV 2003 |
Automated reasoning and model checking › model checking
state space explosion |
0.0 | 1 | 2000 | Virtual Symmetry Reduction · LICS 2000 |
Automated reasoning and model checking › model checking › state space reduction
symmetry reduction |
0.0 | 1 | 2000 | Virtual Symmetry Reduction · LICS 2000 |
Electronic design automation › hardware verification and test
hardware verification |
0.0 | 1 | 2006 | Some Complexity Results for SystemVerilog Assertions · CAV 2006 |
Distributed computing theory
shared memory |
0.0 | 1 | 1997 | Computable Obstructions to Wait-free Computability · FOCS 1997 |
Distributed systems › fault tolerance › failure models
crash failures |
0.0 | 1 | 2004 | A Note on the Homotopy Type of Wait-Free Atomic Snapshot Protocol Complexes · SIAM J. Comput. 2004 |
Memory systems
shared memory |
0.0 | 1 | 2004 | A Note on the Homotopy Type of Wait-Free Atomic Snapshot Protocol Complexes · SIAM J. Comput. 2004 |
Logic in computer science
formal semantics |
0.0 | 1 | 2003 | The Definition of a Temporal Clock Operator · ICALP 2003 |
Methods — techniques the papers use, named apart from their topics
complexity analysis · 0.1span construction · 0.1homotopy theory · 0.1algebraic topology · 0.1task complex · 0.0simplicial complexes · 0.0homology · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2014 | Safety and Liveness, Weakness and Strength, and the Underlying Topological RelationsabstractWe present a characterization that shows what it means for a formula to be a weak or strong version of another formula. We show that the weak version of a formula is not the same as Alpern and Schneider's safety component, but can be achieved by taking the closure in the Cantor topology over an augmented alphabet in which every formula is satisfiable. The resulting characterization allows us to show that the set of semantically weak formulas is exactly the set of nonpathological safety formulas. Furthermore, we use the characterization to show that the original versions of the ieee standard temporal logics psl and sva are broken, and we show that the source of the problem lies in the semantics of the sere intersection and fusion operators. Finally, we use the topological characterization to show the internal consistency of the alternative semantics adopted by the latest version of the psl standard. Cindy Eisner, Dana Fisman, John Havlicek |
ACM Trans. Comput. Log. | 3 |
| 2012 | Synchronizing AMS Assertions with AMS Simulation: From Theory to PracticeabstractThe verification community anticipates the adoption of assertions in the Analog and Mixed-Signal (AMS) domain in the near future. Several questions need to be answered before AMS assertions are brought into practice, such as: (a) How will the languages for AMS assertions be different from the ones in the digital domain? (b) Does the analog simulator have to be assertion aware? (c) If so, then how and where on the time line will the AMS assertion checker synchronize with the analog simulator? and (d) What will be the performance penalty for monitoring AMS assertions accurately over analog simulation? This article attempts to answer these questions through theoretical analysis and empirical results obtained from industrial test cases. We study logics which extend Linear Temporal Logic (LTL) with predicates over real variables, and show that further extensions allowing the binding of real-valued variables across time makes the logic undecidable. We present a toolkit which can integrate with existing AMS simulators for checking AMS assertions on practical designs. We study the problem of synchronizing the AMS simulator with the AMS assertion checker and demonstrate the performance penalty of different synchronization options. Subhankar Mukherjee 0001, Pallab Dasgupta, Siddhartha Mukhopadhyay, Scott Little, John Havlicek, Srikanth Chandrasekaran |
ACM Trans. Design Autom. Electr. Syst. | 5 |
| 2011 | Realtime regular expressions for analog and mixed-signal assertions
John Havlicek, Scott Little |
FMCAD | 1 |
| 2006 | Some Complexity Results for SystemVerilog Assertions
Doron Bustan, John Havlicek |
CAV | 2 |
| 2005 | A topological characterization of weaknessabstractWe are interested in the relation between weak and strong temporal operators. We would like to find a characterization that shows what it means for an operator to be the weak or strong version of another operator, or more generally for a formula to be a weak or strong version of another formula. We show that the weak version of a formula is not the same as Alpern and Schneider's safety component. By working over an extended alphabet, we show that their topological characterization of safety can be adapted to obtain a topological characterization of weakness. We study the resulting topology and the relations between weak and strong formulas. Finally, we apply the method to show the internal consistency of a logic containing both weak and strong versions of regular expressions. Cindy Eisner, Dana Fisman, John Havlicek |
PODC | 3 |
| 2004 | A Note on the Homotopy Type of Wait-Free Atomic Snapshot Protocol ComplexesabstractIn the atomic snapshot system model, the processes of an asynchronous distributed system communicate by atomic write and atomic snapshot read operations on a shared memory consisting of single-writer multiple-reader registers. The processes may fail by crashing. It is shown that in this model, a wait-free full-information protocol complex is homotopy equivalent to the underlying input complex. A span in the sense of Herlihy and Shavit provides the homotopy equivalence. It follows that the protocol and input complexes are indistinguishable by ordinary homology or homotopy groups. John Havlicek |
SIAM J. Comput. | 1 |
| 2003 | Reasoning with Temporal Logic on Truncated Paths
Cindy Eisner, Dana Fisman, John Havlicek, Yoad Lustig, Anthony McIsaac, David Van Campenhout |
CAV | 3 |
| 2003 | The Definition of a Temporal Clock Operator
Cindy Eisner, Dana Fisman, John Havlicek, Anthony McIsaac, David Van Campenhout |
ICALP | 3 |
| 2003 | Formal Verification Successes at Motorola
Magdy S. Abadir, Ken Albin, John Havlicek, Narayanan Krishnamurthy, Andrew K. Martin |
Formal Methods Syst. Des. | 3 |
| 2000 | Virtual Symmetry ReductionabstractWe provide a general method for ameliorating state explosion via symmetry reduction in certain asymmetric systems, such as systems with many similar, but not identical, processes. The method applies to systems whose structures (i.e., state transition graphs) have more state symmetries than arc symmetries. We introduce a new notion of "virtual symmetry" that strictly subsumes earlier notions of "rough symmetry" and "near symmetry" (Emerson and Trefler, 1999). Virtual symmetry is the most general condition under which the structure of a system is naturally bisimilar to its quotient by a group of state symmetries. We give several example systems exhibiting virtual symmetry that are not amenable to symmetry reduction by earlier techniques: a one-lane bridge system, where the direction with priority for crossing changes dynamically; an abstract system with asymmetric communication network; and a system with asymmetric resource sharing motivated from the drinking philosophers problem. These examples show that virtual symmetry reduction applies to a significantly broader class of asymmetric systems than could be handled before. E. Allen Emerson, John Havlicek, Richard J. Trefler |
LICS | 2 |
| 2000 | Computable Obstructions to Wait-Free Computability
John Havlicek |
Distributed Comput. | 1 |
| 1997 | Computable Obstructions to Wait-free ComputabilityabstractEffectively computable obstructions are associated to a distributed decision task (/spl Iscr/,/spl Oscr/,/spl Delta/) in the asynchronous, wait-free, read-write shared-memory model. The key new ingredient of this work is the association of a simplicial complex /spl Tscr/, the task complex, to the input-output relation d. The task determines a simplicial map /spl alpha/ from /spl Tscr/ to the input complex /spl Iscr/. The existence of a wait-free protocol solving the task implies that the map /spl alpha//sub */ induced in homology must surject, and thus elements of H/sub */(/spl Iscr/) that are not in the image of /spl alpha//sub */, are obstructions to solvability of the task. These obstructions are effectively computable when using suitable homology theories, such as mod-2 simplicial homology. We also extend Herlihy and Shavit's Theorem on Spans to the case of protocols that are anonymous relative to the action of a group, provided the action is suitably rigid. For such rigid actions, the quotients of the input complex and the task complex by the group are well-behaved, and obstructions to anonymous solvability of the task are obtained analogously, using the homology of the quotient complexes. John Havlicek |
FOCS | 1 |