Surface electromyography (sEMG) is a non-invasive technique widely used to assess muscle activation and function. This study was aimed to investigate the relationship between sEMG signal features and hand grip strength in healthy individuals across different ages and genders. A total of 280 participants (122 males, 158 females), aged 20 years and above, were categorized into six age groups. Grip strength was measured using a digital hand dynamometer, and sEMG signals of four upper-limb muscles, biceps brachii, triceps brachii, brachioradialis, and flexor carpi ulnaris, were recorded at the same time. Root mean square (RMS) features were extracted from the sEMG signals to represent muscle activation. Pearson correlations were performed to analyze the relationship between RMS values and grip force. Results show a strong positive correlation between sEMG features and grip strength. These findings suggest that RMS-based sEMG analysis may provide a reliable, non-invasive indicator of grip strength and could aid in early detection of muscular decline in clinical or aging populations.

This paper presents a lightweight and flexible artificial neural network (ANN) model for predicting the transfer characteristics of amorphous Indium Gallium Zinc Oxide (a-IGZO) thin-film transistors (TFTs). Traditional Technology Computer-Aided Design (TCAD) simulations, while accurate, are computationally intensive and inflexible to rapid design variations. Prior efforts using variational autoencoders (VAEs) showed promise but were limited by rigid input formats that required retraining for any changes in curve dimension or voltage range. To overcome this, we propose an ANN architecture that treats gate voltage as a dynamic input, enabling continuous and accurate predictions across a wide voltage spectrum without the need for retraining. Experimental evaluation through 5-fold cross-validation confirms the ANN’s competitive performance, achieving an average ℝ2score of 0.9898, outperforming VAE models in flexibility and robustness. This approach offers a fast, accurate, and hardware-efficient alternative for a-IGZO TFT modeling and optimization, facilitating the monolithic 3D (M3D) integration and the next generation of display.

With the proliferation of sensors and the emergence of novel applications, IoT data has grown exponentially in recent years. Given this trend, efficient data management is crucial for a system to easily access vast amounts of information. For decades, B + -tree-based indexing schemes have been widely adopted for providing effective search in IoT systems. However, in systems with pre-distributed sensors, B + -tree-based indexes fail to optimally utilize the known IoT data distribution, leading to significant write overhead and energy consumption. Furthermore, as non-volatile memory (NVM) technology emerges as the alternative storage medium, the inherent write asymmetry of NVM leads to instability issues in IoT systems, especially for write-intensive applications. In this research, by considering the write overheads of tree-based indexing schemes and key-range distribution assumption, we rethink the design of the tree-based indexing schemes and propose an adaptive pre-built tree (APB-tree) indexing scheme to reduce the write overhead in serving insertion and deletion of keys in the NVM-based IoT system. The APB-tree profiles the hot region of the key distribution from the known key range to pre-allocate the index structure that alleviates online index management costs and runtime index overhead. Meanwhile, the APB-tree maintains the scalability of a tree-based index structure to accommodate the large amount of new data brought by the additional nodes to the IoT system. Extensive experiments demonstrate that our solution achieves significant performance improvements in write operations while maintaining effective energy consumption in the NVM-based IoT system. We compare the energy and time required for basic key operations such as Put(), Get(), and Delete() in APB-trees and B + -tree-based indexing schemes. Under workloads with varying ratios of these operations, the proposed design effectively reduces execution time by 47% to 72% and energy consumption by 11% to 72% compared to B + -tree-based indexing schemes.

Even though flash memory is widely used in many applications as storage due to its high performance, demands for lower storage cost and better I/O performance are still high because of the continuous growth of data. Data deduplication has the potential to address these issues by eliminating redundant writes in I/O workloads and different strategies have been proposed to improve its efficiency. However, existing designs mainly rely on time-consuming SHA-1 fingerprint scheme or byte-by-byte comparison to identify duplicate data, and these methods cause much overhead and become a bottleneck in data deduplication. To tackle this issue, we propose the hierarchical fingerprint scheme (HF-Dedupe) to improve the efficiency of data deduplication for flash-based storage systems. By leveraging multiple levels of light-weight hashes in the fingerprint, our design only takes the minimal effort to distinguish different data in write traffic. In order to evaluate our design, a series of experiments were conducted based on trace-driven simulations. Compared with other designs, the experimental results show that HF-Dedupe further reduces the deduplication time by 34.76%-65.02 % while retaining high deduplication ratio, and therefore achieves the most improvement to overall I/O performance.

Interlaced Magnetic Recording (IMR) is an emerging recording technology for hard-disk drives (HDDs) that provides larger storage capacity at a lower cost. By partially overlapping (interlacing) each bottom track with two adjacent top tracks, IMR-based HDDs successfully increase the data density while incurring some hardware write constraints. To update each bottom track, the data on two adjacent top tracks must be read and rewritten to avoid losing their valid data, resulting in additional overhead for performing read-modify-write (RMW) operations. Therefore, researchers have proposed various data management schemes to mitigate such overhead in recent years, aiming at improving the write performance. However, these designs have not taken into account the data characteristics of the file system, which is a crucial layer of operating systems for storing/retrieving data into/from HDDs. Consequently, the write performance improvement is limited due to the unawareness of spatial locality and hotness of data. This paper proposes a file-system-aware data management scheme called FSIMR to improve system write performance. Noticing that data of the same directory may have higher spatial locality and are mostly updated at the same time, FSIMR logically partitions the IMR-based HDD into fixed-sized zones; data belonging to the same directory will be arranged to one zone to reduce the time of seeking to-be-updated data (seek time). Furthermore, cold data within a zone are arranged to bottom tracks and updated in an out-of-place manner to eliminate RMW operations. Our experimental results show that the proposed FSIMR could reduce the seek time by up to 14% without introducing additional RMW operations, compared to existing designs.

Due to the data-driven intelligence from the recent deep learning based approaches, the huge amount of data collected from various kinds of sensors from industrial devices have the potential to revolutionize the current technologies used in the industry. To improve the efficiency and quality of machines, the machine manufacturer needs to acquire the history of the machine operation process. However, due to the business secrecy, the factories are not willing to do so. One promising solution to the abovementioned difficulty is the synthetic dataset and an informatic network structure, both through deep generative models such as differentially private generative adversarial networks. Hence, this article initiates the study of the utility difference between the abovementioned two kinds. We carry out an empirical study and find that the classifier generated by private informatic network structure is more accurate than the classifier generated by private synthetic data, with approximately 0.31–7.66%.

In modern VLSI designs, I/O counts have been growing continuously as the system becomes more complicated. To achieve higher routability, the hexagonal array is introduced with higher pad density and a larger pitch. However, the routing for hexagonal arrays is significantly different from that for traditional gird and staggered arrays. In this paper, we consider the Y-architecture-based flip-chip routing used for the hexagonal array. Unlike the conventional Manhattan and the X-architectures, the Y-architecture allows wires to be routed in three directions, namely, 0-, 60-, and 120-degrees. We first analyze the routing properties of the hexagonal array. Then, we propose a triangular tile model and a chord-based internal node division method that can handle both pre-assignment and free-assignment nets without wire crossing. Finally, we develop a novel dynamic programming-based bend minimization method to reduce the number of routing bends in the final solution. Experimental results show that our algorithm can achieve 100% routability with minimized total wirelength and the number of routing bends effectively.

In advanced packages, redistribution layers (RDLs) are extra metal layers for high interconnections among the chips and printed circuit board (PCB). To better utilize the routing resources of RDLs, published works adopted flexible vias such that they can place the vias everywhere. Furthermore, some regions may be blocked for signal integrity protection or manually prerouted nets (such as power/ground nets or feeding lines of antennas) to achieve higher performance. These blocked regions will be treated as obstacles in the routing process. Since the positions of pads, obstacles, and vias can be arbitrary, the structures of RDLs become irregular. The obstacles and irregular structures substantially increase the difficulty of the routing process. This paper proposes a three-stage algorithm: First, the layout is partitioned by a method based on constrained Delaunay triangulation (CDT). Then we present a global routing graph model and generate routing guides for unified-assignment netlists. Finally, a novel tile routing method is developed to obtain detailed routes. Experiment results demonstrate the robustness and effectiveness of our proposed algorithm.

Intermittent systems are usually energy-harvesting embedded systems that harvest energy from ambient environment and perform computation intermittently. Due to the unreliable power, these intermittent systems typically adopt different checkpointing strategies for ensuring the data consistency and execution progress after the systems are resumed from unpredictable power failures. Existing checkpointing strategies are usually suitable for bare-metal intermittent systems with short run time. Due to the improvement of energy-harvesting techniques, intermittent systems are having longer run time and better computation power, so that more and more intermittent systems tend to function with a microkernel for handling more/multiple tasks at the same time. However, existing checkpointing strategies were not designed for (or aware of) such microkernel-based intermittent systems that support the running of multiple tasks, and thus have poor performance on preserving the execution progress. To tackle this issue, we propose a design, called self-adaptive checkpointing strategy (SACS), tailored for microkernel-based intermittent systems. By leveraging the time-slicing scheduler, the proposed design dynamically adjust the checkpointing interval at both run time and reboot time, so as to improve the system performance by achieving a good balance between the execution progress and the number of performed checkpoints. A series of experiments was conducted based on a development board of Texas Instrument (TI) with well-known benchmarks. Compared to the state-of-the-art designs, experiment results show that our design could reduce the execution time by at least 46.8% under different conditions of ambient environment while maintaining the number of performed checkpoints in an acceptable scale.

Intermittent systems enable continuous and accumulative process execution under constraint or unstable power supply. To enable intermittent computing, process status and data are typically checkpointed from volatile memory (VM) to nonvolatile memory (NVM) before running out of power. After power resumes, these logged data can be loaded back from NVM to VM for continuous execution. Nevertheless, existing approaches rarely considered the energy consumed during moving data and may waste precious power resource over data movement, instead of computation. Such observation motivates us to propose an energy-reduction on-chip memory management (ERCM2) scheme to utilize the high cell density and non-volatility of SpinTransfer Torque RAM (STT-RAM) for enabling a hybrid on chip memory architecture. The experimental results show that the proposed scheme can achieve the access performance close to conventional SRAM-based on-chip memory architecture with lower energy consumption.

Spasticity is a common post-stroke syndrome that imposes significant adverse impacts on patients and caregivers. This study aims to improve the efficiency of botulinum toxin (BoNT) in managing spasticity, by utilizing a three-dimensional innervation zone imaging (3DIZI) technique based on high-density surface electromyography (HD-sEMG) recordings. Stroke subjects were randomly assigned to two groups: the control group ([Formula: see text]) which received standard ultrasound-guided injections, and the experimental group ([Formula: see text]) which received 3DIZI-guided injections. The amount of BoNT given was consistent for all subjects. The Modified Ashworth Scale (MAS), compound muscle action potential (CMAP) and muscle activation volume (MAV) from bilateral biceps brachii muscles were obtained at the baseline, 3 weeks, and 3 months after injection. Intra-group and inter-group comparisons of MAS, CMAP amplitude and MAV were performed. An overall improvement in MAS of spastic elbow flexors was observed during the 3-week visit ([Formula: see text]), yet no statistically significant difference found with intra-group or inter-group analysis. Compared to the baseline, a significant reduction of CMAP amplitude and MAV were observed in the spastic biceps muscles of both groups at 3-week post-injection, and returned to approximate baseline value at 12-week post injection. A significantly higher reduction was found in CMAP amplitude ([Formula: see text]% versus [Formula: see text]%, [Formula: see text]) and MAV ([Formula: see text]% versus [Formula: see text]%, [Formula: see text]) in the experimental group compared to the control group. The study has demonstrated preliminary evidence that precisely directing BoNT to the innervation zones (IZs) localized by 3DIZI leads to a significantly higher treatment efficiency improvement in spasticity management. Results have also shown the feasibility of developing a personalized BoNT injection technique for the optimization of clinical treatment for post-stroke spasticity using proposed 3DIZI technique.

Log-Structured Merge-Tree (LSM-tree) based key-value store applications have gained popularity due to their high write performance. To further pursue better performance for key-value applications, various researches were conducted by adopting different architectures of flash devices, such as key-value solid-state drives (KVSSDs). However, since LSM-trees were originally designed based on the architecture of hard disk drives (HDDs), true potential of SSDs can not be well exploited without re-designing the management strategy. In this work, we propose Parallel-Log-Single-Compaction-Tree (PLSC-tree), which is a two-level and flash-friendly key-value management strategy specially tailored for KVSSDs. In particular, the first layer takes advantage of the massive internal parallelism of SSDs for maximizing the write performance via logging, while the second layer is designed to alleviate the internal recycling (i.e., compaction) overheads of flash devices for ultimately optimizing the performance on managing key-value pairs. A series of experiments were conducted based on a well-known SSD simulator with realistic workloads, and the results are very encouraging.

Growing demand for key-value store applications is building a strong momentum for the commercialization of key-value hard disk drives. To achieve better performance, flash-based solid state drive is the next ideal candidate for commercialization in the foreseeable future. However, the existing fixed-sized management strategies of flash-based devices would potentially result in low storage space utilization when managing variable-sized key-value data. In addition, the low storage space utilization would further lead to the degradation of device performance, due to low invalid data space reclamation efficiency. The space utilization issue motivates this paper to propose a key-value flash translation layer design to improve storage space utilization as well as the performance of the key-value solid state drives. A series of experiments was conducted to evaluate the proposed design, and the experiment results of space utilization and device performance are very encouraging.

Traversing game is a two-person game played on a connected undirected simple graph with a source node and a destination node. A pebble is placed on the source node initially and then moves autonomously according to some rules. Alice is the player who wants to set up rules for each node to determine where to forward the pebble while the pebble reaches the node, so that the pebble can reach the destination node. Bob is the second player who tries to deter Alice's effort by removing edges. Given access to Alice's rules, Bob can remove as many edges as he likes, while retaining the source and destination nodes connected. Under the guide of Alice's rules, if the pebble arrives at the destination node, then we say Alice wins the traversing game; otherwise the pebble enters an endless loop without passing through the destination node, then Bob wins. We assume that Alice and Bob both play optimally. We study the problem: When will Alice have a winning strategy? This actually models a routing recovery problem in Software Defined Networking in which some links may be broken. In this paper, we prove a dichotomy result for certain traversing games, called cyclic-order traversing games. We also give a linear-time algorithm to find the corresponding winning strategy, if one exists.

The strong momentum of key-value store applications drives the commercialization of key-value-specific hard disk drives. To achieve higher degree of performance, the specific flash-based solid state drives would be also commercialized for key-value store applications in the foreseeable future. However, the existing fixed-sized management strategies of flash-based devices would potentially result in low storage space utilization on managing variable-sized key-value data. This problem inspires this paper to propose a key-value flash translation layer (KVFTL) design to improve the storage space utilization of the key-value-specific solid state drives (KVSSDs). A series of experiments was conducted to evaluated the proposed design, and the experimental results on space utilization and device performance are very encouraging.

The growing demands of large capacity fash-based storages have facilitated the down-scaling process of NAND fash memory. Among NAND fash technologies, 3D charge trap fash is regarded as one of the most promising candidates. Owing to the cylindrical geometry of vertical channels, the access performance of each page in one block is distinctive, and this situation is exaggerated in the 3D charge trap fash with the fast-growing number of layers. In this study, a progressive performance boosting strategy is proposed to boost the performance of 3D charge trap fash by utilizing its asymmetric page access speed feature. A series of experiments was conducted to demonstrate the capability of the proposed strategy on improving access performance of 3D charge trap flash.

In recent years, the need for object detection has significantly increased for multi-camera systems. However, the detection methods in such systems incur high computational cost, which leads to a major challenge in real-time applications. In this work, we propose a Scissor Algorithm for object detection using a multi-core CPU and a graphic processing unit (GPU). Leveraging the features of both the CPU and the GPU, the object detection method was enhanced in two stages: (a) pixel-to-pixel color filtering and (b) grouping. The proposed algorithm can effectively shrink the search area for detection and further improve the process of detection, thus effectively increasing the frame rate for real-time applications. Experimental results demonstrate the real-time performance of the proposed algorithm.

The problem of coverage is a fundamental issue in wireless sensor networks. In this article, we consider two subproblems: k -coverage contour evaluation and k -coverage rate deployment. The former aims to evaluate, up to k , the coverage level of any location inside a monitored area, while the latter aims to determine the locations of a given set of sensors to guarantee the maximum increment of k -coverage rate when they are deployed into the area. For the k -coverage contour evaluation problem, a nonuniform-grid-based approach is proposed. We prove that the computation cost of our approach is at most the square root of existing solutions. Based on our k -coverage contour evaluation scheme, a greedy k -coverage rate deployment scheme ( k -CRD) is proposed, which is shown to be an order faster than existing studies for k -coverage rate deployment. The k -CRD can incorporate two different heuristics to further reduce its running time. Simulation results show that k -CRD with these heuristics can be significantly more time efficient without causing much degradation in the coverage rate of final deployment.

Coverage problem is a fundamental issue in wireless sensor networks. In this paper, we consider two sub-problems: k-coverage rate evaluation and k-coverage rate deployment. The former aims to evaluate the ratio of k-covered area relative to the monitored area, while the latter aims to determine the minimum number of sensors required and their locations to guarantee that k-coverage rate of the monitored area meets application requirements. For k-coverage rate evaluation problem, a non-uniform-grid- based approach for random deployments is proposed. For k-coverage rate deployment problem, a greedy-based approach is suggested to meet the requirement of k-coverage rate. Simulation results show that both our schemes are more time efficient than previous work.

This paper presents a new classifier called total margin-based adaptive fuzzy support vector machines (TAF-SVM) that deals with several problems that may occur in support vector machines (SVMs) when applied to the face recognition. The proposed TAF-SVM not only solves the overfitting problem resulted from the outlier with the approach of fuzzification of the penalty, but also corrects the skew of the optimal separating hyperplane due to the very imbalanced data sets by using different cost algorithm. In addition, by introducing the total margin algorithm to replace the conventional soft margin algorithm, a lower generalization error bound can be obtained. Those three functions are embodied into the traditional SVM so that the TAF-SVM is proposed and reformulated in both linear and nonlinear cases. By using two databases, the Chung Yuan Christian University (CYCU) multiview and the facial recognition technology (FERET) face databases, and using the kernel Fisher's discriminant analysis (KFDA) algorithm to extract discriminating face features, experimental results show that the proposed TAF-SVM is superior to SVM in terms of the face-recognition accuracy. The results also indicate that the proposed TAF-SVM can achieve smaller error variances than SVM over a number of tests such that better recognition stability can be obtained.

Multiview face recognition is a very difficult pattern recognition problem due to its large variation. And support vector machine (SVM) can serve as a robust classifier for its excellent generalization ability. This paper proposes a new class called total margin based adaptive fuzzy support vector machines (TAF-SVM) to deal with the some problems that may occur in SVM when applied to multiview face recognition. The proposed TAF-SVM not only solves the overfitting problem due to outliers but also corrects the skew of the optimal separating hyperplane due to the training from very imbalanced datasets. In addition, by introducing the total margin algorithm, a lower generalization error bound can be obtained The above three goals are embodied into the traditional SVM so that the TAF-SVM is proposed and reformulated in both linear and nonlinear cases in this paper. By using the CYCU multiview face database and the kernel Fisher's discriminant analysis (KFDA) method to extract discriminating face features, experimental results indicate that the proposed TAF-SVM is superior to the traditional SVM for multiview face recognition. Also, results demonstrate that the proposed TAF-SVM can achieve smaller error variances than SVM.

Cephalograms are clinically useful for cephalometric diagnosis and superimposition. The measurements for cephalometry has always been done manually in practice. We have developed a cephalometric analysis system which can be used to improve the measurements by computer software. The software was developed as a multi-document interface (MDI) application under the environment of Microsoft Windows. Two kinds of image, cephalograms and tracing papers, are supported. Three modules were included: (1) the automatic landmarking module locates landmarks on the digitized cephalograms; (2) the manual landmarking module provides a function manual to locate the landmarks on the screen through an interactive user interface; and (3) the cephalometric analysis module calculates the measurements. In our experience, it has been shown the system turns out to be a handy tool for orthodontists in diagnosis and treatment.