Demo Data from VLDB 2026 / reviewers in the wild / expert
Eskil Kjelkerud
dblp:70/10975
· DBLP profile ↗
4ranked-venue papers
3as first author
0since 2021 · last 1979
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 3 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
4 papers |
Electronic design automation · 79% Integrated circuit design · 21% |
Topics — the 7 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › hardware verification and test › test generation
d-algorithm |
0.0 | 1 | 1979 | Generation of hazard free tests using the D-algorithm in a timing accurate system for logic and deductive fault simulation · DAC 1979 |
Integrated circuit design › analog and mixed-signal circuits
device modeling |
0.0 | 1 | 1979 | Methods of modelling digital devices for logic simulation · DAC 1979 |
Electronic design automation
hardware verification and test |
0.0 | 1 | 1979 | Generation of hazard free tests using the D-algorithm in a timing accurate system for logic and deductive fault simulation · DAC 1979 |
Electronic design automation › hardware verification and test
logic simulation |
0.0 | 1 | 1979 | Methods of modelling digital devices for logic simulation · DAC 1979 |
Electronic design automation › hardware verification and test
test generation |
0.0 | 1 | 1979 | Generation of hazard free tests using the D-algorithm in a timing accurate system for logic and deductive fault simulation · DAC 1979 |
Electronic design automation
logic synthesis |
0.0 | 1 | 1972 | A Computer Program for the Synthesis of Switching Circuits by Decomposition · IEEE Trans. Computers 1972 |
Electronic design automation › logic synthesis
combinational logic synthesis |
0.0 | 1 | 1972 | A Computer Program for the Synthesis of Switching Circuits by Decomposition · IEEE Trans. Computers 1972 |
Methods — techniques the papers use, named apart from their topics
decomposition chart technique · 0.0ashenhurst theorem · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1979 | Generation of hazard free tests using the D-algorithm in a timing accurate system for logic and deductive fault simulation
Eskil Kjelkerud, Owe Thessén |
DAC | 1 |
| 1979 | Methods of modelling digital devices for logic simulation
Eskil Kjelkerud, Owe Thessén |
DAC | 1 |
| 1975 | Design automation of electronics in Sweden
Ingmar Höglund, L. Fransson, A. A. Almen, Bengt Magnhagen, Eskil Kjelkerud, Owe Thessén |
DAC | 5 |
| 1972 | A Computer Program for the Synthesis of Switching Circuits by DecompositionabstractA computer program, which has a Boolean expression and a functionally complete set of switching functions as input data and as output data, gives a description of a logic diagram that shows the synthesized switching circuit realizing the Boolean expression, is described in this paper. The program utilizes a new proof for a generalized version of a theorem that was first stated by Ashenhurst. It is shown that an implementation of a modified form of the decomposition chart technique is indeed useful for the synthesis of combinational switching circuits. Eskil Kjelkerud |
IEEE Trans. Computers | 1 |