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Taokuan Hu

dblp:70/1175 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1997
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%
Theoretical computer science
1 paper
Logic in computer science · 100%

Topics — the 3 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › timing analysis › static timing analysis
symbolic timing analysis
0.011997
Symbolic Timing Verification of Timing Diagrams using Presburger Formulas · DAC 1997
Electronic design automation › hardware verification and test
timing verification
0.011997
Symbolic Timing Verification of Timing Diagrams using Presburger Formulas · DAC 1997
Logic in computer science › formal arithmetic
presburger arithmetic
0.011997
Symbolic Timing Verification of Timing Diagrams using Presburger Formulas · DAC 1997

Methods — techniques the papers use, named apart from their topics

symbolic timing verification · 0.0presburger formulas · 0.0
YearPublicationVenuePosition
1997 Symbolic Timing Verification of Timing Diagrams using Presburger Formulas
abstract
We present a novel set of tools for performing symbolic timing verificationof timing diagrams. The tools are multi-purpose with usesin verification, derivation of synthesis constraints, and design evaluation.Our methodology is based on using techniques for manipulatingPresburger formulas. We demonstrate using several interestingexamples that the method is efficient in practice and should beconsidered for inclusion in commercial tools.
Tod Amon, Gaetano Borriello, Taokuan Hu, Jiwen Liu
DAC3