As the nascent field of quantum computing develops, an increasing number of quantum hardware modalities, such as superconducting electronic circuits, semiconducting spins, trapped ions, and neutral atoms, have become available for performing quantum computations. These quantum hardware modalities exhibit varying characteristics and implement different universal quantum gate sets that may e.g. contain several distinct two-qubit quantum gates. Adapting a quantum circuit from a, possibly hardware-agnostic, universal quantum gate set to the quantum gate set of a target hardware modality has a crucial impact on the fidelity and duration of the intended quantum computation. However, current quantum circuit adaptation techniques only apply a specific decomposition or allow only for local improvements to the target quantum circuit potentially resulting in a quantum computation with less fidelity or more qubit idle time than necessary. These issues are further aggravated by the multiple options of hardware-native quantum gates rendering multiple universal quantum gates sets accessible to a hardware modality. In this work, we developed a satisfiability modulo theories model that determines an optimized quantum circuit adaptation given a set of allowed substitutions and decompositions, a target hardware modality and the quantum circuit to be adapted. We further discuss the physics of the semiconducting spins hardware modality, show possible implementations of distinct two-qubit quantum gates, and evaluate the developed model on the semiconducting spins hardware modality. Using the developed quantum circuit adaptation method on a noisy simulator, we show the Hellinger fidelity could be improved by up to 40 % and the qubit idle time could be decreased by up to 87 % compared to alternative quantum circuit adaptation techniques.

With the development of the Internet of Things, the sensor usage has been elevated to a new level, and it becomes more crucial to maintain reliable sensor networks. In this article, we provide how to efficiently and reliably manage the sensor monitoring system for ensuring data freshness. A sensor transmits its sensing information regularly to the data center (DC), and the sensed information generally has the correlation over the space and the time. Hence, the accuracy of the estimated information from the sensed information decreases as the target location for information estimation is further away from the sensor or the Age of Information (AoI), the elapsed time from the information generation, increases. Therefore, by considering the effect of the AoI and the distance from the sensor on the estimation error, we newly define an error-tolerable sensing (ETS) coverage as the area that the estimated information at the DC is with smaller error than the target value. To analyze the impact of the AoI on the ETS coverage, we derive the$\eta $-coverage probability, which is the probability that the ETS coverage is greater than$\eta $ratio of the maximum sensor coverage, and the average ETS coverage. We also provide the optimal transmission power of the sensor, which minimizes the average energy consumption while guaranteeing certain level of the$\eta $-coverage probability. Numerical results validate the theoretical analysis and show the tendency of the optimal transmission power according to the maximum number of retransmissions. This article can pave the way to efficient design of the AoI-sensitive sensor networks.

Emerging byte-addressable non-volatile memory (NVRAM) is expected to replace block device storages as an alternative low-latency persistent storage device. If NVRAM is used as a persistent storage device, a cache line instead of a disk page will be the unit of data transfer, consistency, and durability. In this work, we design and develop clfB-tree —a B-tree structure whose tree node fits in a single cache line. We employ existing write combining store buffer and restricted transactional memory to provide a failure-atomic cache line write operation. Using the failure-atomic cache line write operations, we atomically update a clfB-tree node via a single cache line flush instruction without major changes in hardware. However, there exist many processors that do not provide SW interface for transactional memory. For those processors, our proposed clfB-tree achieves atomicity and consistency via in-place update, which requires maximum four cache line flushes. We evaluate the performance of clfB-tree on an NVRAM emulation board with ARM Cortex A-9 processor and a workstation that has Intel Xeon E7-4809 v3 processor. Our experimental results show clfB-tree outperforms wB-tree and CDDS B-tree by a large margin in terms of both insertion and search performance.

Emerging byte-addressable non-volatile memory is considered an alternative storage device for database logs that require persistency and high performance. In this work, we develop NVWAL (NVRAM Write-Ahead Logging) for SQLite. The contribution of NVWAL consists of three elements: (i) byte-granularity differential logging that effectively eliminates the excessive I/O overhead of filesystem-based logging or journaling, (ii) transaction-aware lazy synchronization that reduces cache synchronization overhead by two-thirds, and (iii) user-level heap management of the NVRAM persistent WAL structure, which reduces the overhead of managing persistent objects.

The similarity search problem is found in many application domains including computer graphics, information retrieval, statistics, computational biology, and scientific data processing just to name a few. Recently several studies have been performed to accelerate the k-nearest neighbor (kNN) queries using GPUs, but most of the works develop brute-force exhaustive scanning algorithms leveraging a large number of GPU cores and none of the prior works employ GPUs for an n-ary tree structured index. It is known that multi-dimensional hierarchical indexing trees such as R-trees are inherently not well suited for GPUs because of their irregular tree traversal and memory access patterns. Traversing hierarchical tree structures in an irregular manner makes it difficult to exploit parallelism since GPUs are tailored for deterministic memory accesses. In this work, we develop a data parallel tree traversal algorithm, Parallel Scan and Backtrack (PSB), for kNN query processing on the GPU, this algorithm traverses a multi-dimensional tree structured index while avoiding warp divergence problems. In order to take advantage of accessing contiguous memory blocks, the proposed PSB algorithm performs linear scanning of sibling leaf nodes, which increases the chance to optimize the parallel SIMD algorithm. We evaluate the performance of the PSB algorithm against the classic branch-and-bound kNN query processing algorithm. Our experiments with real datasets show that the PSB algorithm is faster by a large margin than the branch-and-bound algorithm.

This paper describes experimental demonstration of holographic 3D reconstructions with a directly-viewing, transmissive, amplitude-modulating 5.5″ LCD SLM device in monochrome. A full-complex field modulation is achieved by the single amplitude-modulation SLM module using the Burckhardt-encoding scheme at the cost of the decrease in sampling. We define an effective holographic contrast ratio for the first time in this work. We further report that the effective contrast ratio from Burckhardt-encoded hologram is superior to one from conventional amplitude-only encoded hologram.

Inherently multi-dimensional n-ary indexing structures such as R-trees are not well suited for the GPU because of their irregular memory access patterns and recursive back-tracking function calls. It has been known that traversing hierarchical tree structures in an irregular manner makes it difficult to exploit parallelism and to maximize the utilization of GPU processing units. Moreover, the recursive tree search algorithms often fail with large indexes because of the GPU's tiny runtime stack size. In this paper, we propose a novel parallel tree traversal algorithm-massively parallel restart scanning (MPRS) for multi-dimensional range queries that avoids recursion and irregular memory access. The proposed MPRS algorithm traverses hierarchical tree structures with mostly contiguous memory access patterns without recursion, which offers more chances to optimize the parallel SIMD algorithm. We implemented the proposed MPRS range query processing algorithm on n-ary bounding volume hierarchies including R-trees and evaluated its performance using real scientific datasets on an NVIDIA Tesla M2090 GPU. Our experiments show braided parallel SIMD friendly MPRS range query algorithm achieves at least 80 percent warp execution efficiency while task parallel tree traversal algorithm shows only 9-15 percent efficiency. Moreover, braided parallel MPRS algorithm accesses 7-20 times less amount of global memory than task parallel parent link algorithm by virtue of minimal warp divergence.

In distributed query processing systems where caching infrastructure is distributed and scales with the number of servers, it is becoming more important to orchestrate and leverage a large number of cached objects in distributed caching systems seamlessly as the present trend is to build large scalable distributed systems by connecting small heterogeneous machines. With a large scale distributed caching system, a scheduling policy must consider both cache hit ratio and system load balance to optimize multiple queries. A scheduling policy that considers system load but not cache hit ratio often fails to reuse cached data by not assigning a query to the sever that has data objects the query needs. On the contrary, a scheduling policy that considers cache hit ratio but not system load balance may suffer from system load imbalance. To maximize the overall system throughput and to reduce query response time, a multiple query scheduling policy must balance system load and also leverage cached objects. In this paper, we present a distributed query processing framework that exhibits high cache hit ratio while achieving good system load balance. In order to seamlessly manage our distributed scalable caching system, our framework performs autonomic cached data migrations to improve cache hit ratio. Our experiments show that our proposed query scheduling policy and data migration policy significantly improve system throughput by achieving high cache hit ratio while avoiding system load imbalance.

In this work, we demonstrate a 3D DMB player which provides users with realistic 3D services over terrestrial-digital multimedia broadcasting (T-DMB). Since the bit-budget for the transmission of additional data stream is strictly limited in the current state of T-DMB, the 3D services are based on depth-image-based rendering (DIBR) that the depth information as the additional data can be compressed efficiently. This demonstration presents a depth preprocessing procedure for reducing holes (disocclusion area) in transmitters and a fast rendering procedure using look-up-table (LUT) in receivers. By means of the 3D services, viewers can consumes realistic and exciting 3D contents in mobile 3D DMB players.

Frequency analysis of visual data is a fundamental step in understanding the characteristics of the data and developing necessary tools for processing it. When it comes to analyzing stereoscopic 3-D images, however, conventional methods for 2-D images need to be modified because stereoscopic 3-D images are created by a cognitive process of the human brain. We present the frequency domain analysis of a stereoscopic 3-D image with a geometry model of human binocular vision, and based on the analysis, we propose a disparity-adaptive anti-aliasing filter. From our analysis, we concluded that there is an inherent cause of aliasing due to frequency scaling by disparity. The analysis result is consistent with the knowledge obtained from past experiences, which supports the reliability of the analysis, and the proposed filter can be used for reducing undesirable visual discomfort.

Camera calibration is to estimate the intrinsic and extrinsic parameters of a camera. Most of object-based calibration methods used 3D or 2D pattern. A novel and more flexible 1D object-based calibration was introduced only a couple of years ago, but merely for estimation of intrinsic parameters. The estimation of extrinsic papers is essential when multiple cameras are involved for simultaneously taking images from different view angles and when the knowledge of relative locations between the cameras is required. Though it is relatively simple using 2D or 3D calibration pattern, the estimation of extrinsic parameters is not obvious using 1D pattern. In this paper, we will perform a 1D camera calibration involving both intrinsic and extrinsic parameters.

Hexagonal structure is different from the traditional square structure for image representation. The geometrical arrangement of pixels on hexagonal structure can be described in terms of a hexagonal grid. Uniformly separating image into seven similar copies with a smaller scale has commonly been used for parallel and accurate image processing on hexagonal structure. However, all the existing hardware for capturing image and for displaying image are produced based on square architecture. It has become a serious problem affecting the advanced research based on hexagonal structure. Furthermore, the current techniques used for uniform separation of images on hexagonal structure do not coincide with the rectangular shape of images. This has been an obstacle in the use of hexagonal structure for image processing. In this paper, we briefly review a newly developed virtual hexagonal structure that is scalable. Based on this virtual structure, algorithms for uniform image separation are presented. The virtual hexagonal structure retains image resolution during the process of image separation, and does not introduce distortion. Furthermore, images can be smoothly and easily transferred between the traditional square structure and the hexagonal structure while the image shape is kept in rectangle

In this paper, we introduce our experience on the development of a three-dimensional audio-visual (3D AV) service system based on the terrestrial digital multimedia broadcasting (T-DMB) system. 3D AV service is now much more feasible than before with the fast advancement of hardware technologies, especially 3D flat panel display, processors and memory. 3D AV service over DMB system is very attractive due to the facts that (1) glassless 3D viewing with small display is relatively easy to implement and more suitable to the single user environment like DMB, (2) DMB is a new media and thus has more flexibility in adding new services on the existing ones, (3) 3D AV handling capability of 3D DMB terminal has lots of potential to generate new types of services if it is added with other components like built-in stereo camera. In order to provide successful 3D DMB services over existing DMB system, we need to solve several issues like (1) guaranteeing backward compatibility with the T-DMB system, (2) minimizing the overhead on the transmitted bit-rate and the required processing power of the terminal, (3) providing good 3D depth perception without a noticeable eye strain. We propose a very efficient and backward compatible system architecture for the 3D DMB, and show how we can get better depth perception with the limited bit budget of the DMB system

Recently, FD (frame dropping)-CD (coefficient dropping) transcoding has been considered, mainly due to the low computational complexity and simple implementation. However, CD errors in the FD-CD transcoding scheme tend to be propagated and they have a significant effect on the qualities of decoded images. We derive the error characteristics incurred by CD operations and propose an effective estimation model that adaptively describes well the characteristics of propagation errors in the compressed domain. Furthermore, we apply the proposed model to distortion control achieving nearly constant distortion allocation among frames. Simulations show that the proposed model is quite accurate in estimating the overall distortions and is effectively applied to distortion control over a range of sequences with varying scene types.

In this paper, we describe the real-time implementation effort of MPEG-4 audio HVXC (Harmonic Vector eXcitation Coding) encoder algorithm for very low bitrates, which has target applications from mobile communications to Internet telephony, on current high performance floating point DSP. Using the C-language and assembly-language level optimization for time-critical functional codes, utilizing the internal program memory of the DSP as the program cache, and further utilizing the internal data memory operation and DMA functionality we could get a goal of realtime operation of HVXC encoder both at 2 kbit/s and at 4 kbit/s.

The overall performance of Minimum Augmented Pipelining (MAP) filters, which belong to the class of Clustered Look-Ahead (CLA) filters is extensively analyzed to compare with the performance of Scattered Look-Ahead (SLA) filters with decomposition. Complexity, stability, quantization noise including overflow nonlinearities and the optimality of the algorithm itself are considered for the second-order prototype filter.>