VLDB 2026 Research / reviewers in the wild / expert
Glenn A. Orton
dblp:71/5473
· DBLP profile ↗
3ranked-venue papers
3as first author
0since 2021 · last 1993
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Security and privacy · 2 · 2 first-authorSystems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
3 papers |
Integrated circuit design · 79% Hardware reliability and fault tolerance · 21% | |
| Network and information security
2 papers |
Cryptographic primitives and cryptanalysis · 100% | |
| Theoretical computer science
1 paper |
Coding theory · 100% |
Topics — the 10 heaviest of 10, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › digital circuit design
arithmetic circuit design |
0.0 | 1 | 1993 | A Design of a Fast Pipelined Modular Multiplier Based on a Diminished-Radix Algorithm · J. Cryptol. 1993 |
Integrated circuit design › digital circuit design › arithmetic circuit design
modular multiplier |
0.0 | 1 | 1993 | A Design of a Fast Pipelined Modular Multiplier Based on a Diminished-Radix Algorithm · J. Cryptol. 1993 |
Hardware reliability and fault tolerance
error detection and correction |
0.0 | 1 | 1992 | New Fault Tolerant Techniques for Residue Number Systems · IEEE Trans. Computers 1992 |
Integrated circuit design
residue number system arithmetic |
0.0 | 1 | 1992 | New Fault Tolerant Techniques for Residue Number Systems · IEEE Trans. Computers 1992 |
Integrated circuit design
digital circuit design |
0.0 | 1 | 1986 | VLSI Implementation of Public-Key Encryption Algorithms · CRYPTO 1986 |
Cryptographic primitives and cryptanalysis › public-key cryptography
modular multiplication |
0.0 | 1 | 1993 | A Design of a Fast Pipelined Modular Multiplier Based on a Diminished-Radix Algorithm · J. Cryptol. 1993 |
Cryptographic primitives and cryptanalysis
public-key cryptography |
0.0 | 1 | 1993 | A Design of a Fast Pipelined Modular Multiplier Based on a Diminished-Radix Algorithm · J. Cryptol. 1993 |
Coding theory
chinese remainder theorem |
0.0 | 1 | 1992 | New Fault Tolerant Techniques for Residue Number Systems · IEEE Trans. Computers 1992 |
Coding theory › error-correcting codes
error detection |
0.0 | 1 | 1992 | New Fault Tolerant Techniques for Residue Number Systems · IEEE Trans. Computers 1992 |
Cryptographic primitives and cryptanalysis › public-key cryptography
public-key encryption |
0.0 | 1 | 1986 | VLSI Implementation of Public-Key Encryption Algorithms · CRYPTO 1986 |
Methods — techniques the papers use, named apart from their topics
weighted approximation · 0.0redundant residue representation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1993 | A Design of a Fast Pipelined Modular Multiplier Based on a Diminished-Radix Algorithm
Glenn A. Orton, Lloyd E. Peppard, Stafford E. Tavares |
J. Cryptol. | 1 |
| 1992 | New Fault Tolerant Techniques for Residue Number SystemsabstractPreviously proposed error detection algorithms for the residue number system require a complete recombination. A weighted approximation via the Chinese remainder theorem is shown to be sufficient to detect 100% of single errors. This makes real-time single-error diagnosis possible, which involves up to N+2 iterations of detection (N is the number of nonredundant channels). One approach uses a scaled range of L+1+log/sub 2/ (N+1) bits for detection in contrast with full decoding of approximately=L(N+1) bits, where L is the number of bits in the largest modulus. A second method forms a redundant residue number representation of the overflow multiplier A(x), although A(x) does not need to be carried through processing operations. This permits real-time single-error diagnosis and correction with a parallel array of approximately=(N+2)/sup 2/ tables.> Glenn A. Orton, Lloyd E. Peppard, Stafford E. Tavares |
IEEE Trans. Computers | 1 |
| 1986 | VLSI Implementation of Public-Key Encryption Algorithms
Glenn A. Orton, M. P. Roy, P. Andrew Scott, Lloyd E. Peppard, Stafford E. Tavares |
CRYPTO | 1 |