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Vignesh T. Ravi

dblp:71/7684 · DBLP profile ↗
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20ranked-venue papers
9as first author
0since 2021 · last 2014
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 20 · 9 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
6 papers
GPUs and heterogeneous computing · 38% Cloud and datacenter computing · 32% Energy-efficient computing · 14%
Software engineering, system software, and programming languages
3 papers
Concurrent programming · 94% Operating systems · 6%

Topics — the 22 heaviest of 22, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Concurrent programming › concurrency bug detection
data race detection
0.322014
GMRace: Detecting Data Races in GPU Programs via a Low-Overhead Scheme · IEEE Trans. Parallel Distributed Syst. 2014
GRace: a low-overhead mechanism for detecting data races in GPU programs · PPoPP 2011
Concurrent programming › concurrency bug detection › data race detection
GPU data race detection
0.322014
GMRace: Detecting Data Races in GPU Programs via a Low-Overhead Scheme · IEEE Trans. Parallel Distributed Syst. 2014
GRace: a low-overhead mechanism for detecting data races in GPU programs · PPoPP 2011
GPUs and heterogeneous computing
GPU programming
0.212014
GMRace: Detecting Data Races in GPU Programs via a Low-Overhead Scheme · IEEE Trans. Parallel Distributed Syst. 2014
Parallel and multicore computing › parallel computing › parallel program analysis › concurrency bug detection
race detection
0.212014
GMRace: Detecting Data Races in GPU Programs via a Low-Overhead Scheme · IEEE Trans. Parallel Distributed Syst. 2014
Energy-efficient computing › power management › system-level power management
coordinated power management
0.212013
Coordinated energy management in heterogeneous processors · SC 2013
Energy-efficient computing
power management
0.212013
Coordinated energy management in heterogeneous processors · SC 2013
Cloud and datacenter computing
cluster resource management and scheduling
0.112012
ValuePack: value-based scheduling framework for CPU-GPU clusters · SC 2012
GPUs and heterogeneous computing › GPU resource management
GPU cluster resource management
0.112012
A virtual memory based runtime to support multi-tenancy in clusters with GPUs · HPDC 2012
Cloud and datacenter computing › cluster resource management and scheduling › cluster scheduling
heterogeneous cluster scheduling
0.112012
ValuePack: value-based scheduling framework for CPU-GPU clusters · SC 2012
GPUs and heterogeneous computing › heterogeneous cluster computing
heterogeneous CPU-GPU cluster
0.112012
ValuePack: value-based scheduling framework for CPU-GPU clusters · SC 2012
Cloud and datacenter computing
multi-tenancy
0.112012
A virtual memory based runtime to support multi-tenancy in clusters with GPUs · HPDC 2012
Cloud and datacenter computing
resource management
0.112012
A virtual memory based runtime to support multi-tenancy in clusters with GPUs · HPDC 2012
Cloud and datacenter computing › resource management
cloud resource management
0.112011
Supporting GPU sharing in cloud environments with a transparent runtime consolidation framework · HPDC 2011
Parallel and multicore computing › parallel computing › parallel program debugging
data race detection
0.112011
GRace: a low-overhead mechanism for detecting data races in GPU programs · PPoPP 2011
GPUs and heterogeneous computing
GPU sharing
0.112011
Supporting GPU sharing in cloud environments with a transparent runtime consolidation framework · HPDC 2011
GPUs and heterogeneous computing › GPU resource management
GPU virtualization
0.112011
Supporting GPU sharing in cloud environments with a transparent runtime consolidation framework · HPDC 2011
GPUs and heterogeneous computing
CPU-GPU power management
0.012013
Coordinated energy management in heterogeneous processors · SC 2013
GPUs and heterogeneous computing › heterogeneous architecture
heterogeneous processors
0.012013
Coordinated energy management in heterogeneous processors · SC 2013
Operating systems › resource management › memory management
virtual memory
0.012012
A virtual memory based runtime to support multi-tenancy in clusters with GPUs · HPDC 2012
Cloud and datacenter computing › cluster resource management and scheduling
job co-location
0.012012
ValuePack: value-based scheduling framework for CPU-GPU clusters · SC 2012
Distributed systems
resource sharing
0.012012
ValuePack: value-based scheduling framework for CPU-GPU clusters · SC 2012
GPUs and heterogeneous computing › GPU scheduling
GPU kernel scheduling
0.012011
Supporting GPU sharing in cloud environments with a transparent runtime consolidation framework · HPDC 2011

Methods — techniques the papers use, named apart from their topics

static analysis · 0.6dynamic instrumentation · 0.6happens-before analysis · 0.2scheduling heuristics · 0.1kernel molding · 0.1consolidation algorithm · 0.1affinity score · 0.1
YearPublicationVenuePosition
2014 GMRace: Detecting Data Races in GPU Programs via a Low-Overhead Scheme
abstract
In recent years, GPUs have emerged as an extremely cost-effective means for achieving high performance. While languages like CUDA and OpenCL have eased GPU programming for nongraphical applications, they are still explicitly parallel languages. All parallel programmers, particularly the novices, need tools that can help ensuring the correctness of their programs. Like any multithreaded environment, data races on GPUs can severely affect the program reliability. In this paper, we propose GMRace, a new mechanism for detecting races in GPU programs. GMRace combines static analysis with a carefully designed dynamic checker for logging and analyzing information at runtime. Our design utilizes GPUs memory hierarchy to log runtime data accesses efficiently. To improve the performance, GMRace leverages static analysis to reduce the number of statements that need to be instrumented. Additionally, by exploiting the knowledge of thread scheduling and the execution model in the underlying GPUs, GMRace can accurately detect data races with no false positives reported. Our experimental results show that comparing to previous approaches, GMRace is more effective in detecting races in the evaluated cases, and incurs much less runtime and space overhead.
Mai Zheng, Vignesh T. Ravi, Gagan Agrawal
IEEE Trans. Parallel Distributed Syst.2
2013 Coordinated energy management in heterogeneous processors
abstract
This paper examines energy management in a heterogeneous processor consisting of an integrated CPU-GPU for high-performance computing (HPC) applications. Energy management for HPC applications is challenged by their uncompromising performance requirements and complicated by the need for coordinating energy management across distinct core types -- a new and less understood problem.
Indrani Paul, Vignesh T. Ravi, Srilatha Manne, Manish Arora, Sudhakar Yalamanchili
SC2
2013 Scheduling concurrent applications on a cluster of CPU-GPU nodes
Vignesh T. Ravi, Michela Becchi, Wei Jiang 0037, Gagan Agrawal, Srimat T. Chakradhar
Future Gener. Comput. Syst.1
2012 Scheduling Concurrent Applications on a Cluster of CPU-GPU Nodes
abstract
Heterogeneous architectures comprising a multicore CPU and many-core GPU(s) are increasingly being used within cluster and cloud environments. In this paper, we study the problem of optimizing the overall throughput of a set of applications deployed on a cluster of such heterogeneous nodes. We consider two different scheduling formulations. In the first formulation, we consider jobs that can be executed on either the GPU or the CPU of a single node. In the second formulation, we consider jobs that can be executed on the CPU, GPU, or both, of any number of nodes in the system. We have developed scheduling schemes addressing both of the problems. In our evaluation, we first show that the schemes proposed for first formulation outperform a blind round-robin scheduler and approximate the performances of an ideal scheduler that involves an impractical exhaustive exploration of all possible schedules. Next, we show that the scheme proposed for the second formulation outperforms the best of existing schemes for heterogeneous clusters, TORQUE and MCT, by up to 42%.
Vignesh T. Ravi, Michela Becchi, Wei Jiang 0037, Gagan Agrawal, Srimat T. Chakradhar
CCGRID1
2012 GMProf: A low-overhead, fine-grained profiling approach for GPU programs
abstract
Driven by the cost-effectiveness and the power-efficiency, GPUs are being increasingly used to accelerate computations in many domains. However, developing highly efficient GPU implementations requires a lot of expertise and effort. Thus, tool support for tuning GPU programs is urgently needed, and more specifically, low-overhead mechanisms for collecting fine-grained runtime information are critically required. Unfortunately, profiling tools and mechanisms available today either collect very coarse-grained information, or have prohibitive overheads. This paper presents a low-overhead and fine-grained profiling technique developed specifically for GPUs, which we refer to as GMProf. GMProf uses two ideas to help reduce the overheads of collecting fine-grained information. The first idea involves exploiting a number of GPU architectural features to collect reasonably accurate information very efficiently, and the second idea is to use simple static analysis methods to reduce the overhead of runtime profiling. The specific implementation of GMProf we report in this paper focuses on shared memory usage. Particularly, we help programmers understand (1) which locations in shared memory are infrequently accessed? and (2) which data elements in device memory are frequently accessed? We have evaluated GMProf using six popular GPU kernels with different characteristics. Our experimental results show that GMProf, with all optimizations, incurs a moderate overhead, e.g., 1.36 times on average for shared memory profiling. Furthermore, for three of the six evaluated kernels, GMProf verified that shared memory is effectively used, and for the remaining three kernels, it not only helped accurately identify the inefficient use of shared memory, but also helped tune the implementations. The resulting tuned implementations had a speedup of 15.18 times on average.
Mai Zheng, Vignesh T. Ravi, Wenjing Ma, Gagan Agrawal
HiPC2
2012 A virtual memory based runtime to support multi-tenancy in clusters with GPUs
abstract
Graphics Processing Units (GPUs) are increasingly becoming part of HPC clusters. Nevertheless, cloud computing services and resource management frameworks targeting heterogeneous clusters including GPUs are still in their infancy. Further, GPU software stacks (e.g., CUDA driver and runtime) currently provide very limited support to concurrency.
Michela Becchi, Kittisak Sajjapongse, Ian Graves, Adam M. Procter, Vignesh T. Ravi, Srimat T. Chakradhar
HPDC5
2012 ValuePack: value-based scheduling framework for CPU-GPU clusters
abstract
Heterogeneous computing nodes are becoming commonplace today, and recent trends strongly indicate that clusters, supercomputers, and cloud environments will increasingly host more heterogeneous resources, with some being massively parallel (e.g., GPU). With such heterogeneous environments becoming common, it is important to revisit scheduling problems for clusters and cloud environments. In this paper, we formulate and address the problem of value-driven scheduling of independent jobs on heterogeneous clusters, which captures both the urgency and relative priority of jobs. Our overall scheduling goal is to maximize the aggregate value or yield of all jobs. Exploiting the portability available from the underlying programming model, we propose four novel scheduling schemes that can automatically and dynamically map jobs onto heterogeneous resources. Additionally, to improve the utilization of massively parallel resources, we also propose heuristics to automatically decide when and which jobs can share a single resource.
Vignesh T. Ravi, Michela Becchi, Gagan Agrawal, Srimat T. Chakradhar
SC1
2012 Compiler and runtime support for enabling reduction computations on heterogeneous systems
abstract
SUMMARY A trend that has materialized, and has given rise to much attention, is of the increasingly heterogeneous computing platforms. Presently, it has become very common for a desktop or a notebook computer to come equipped with both a multi‐core CPU and a graphics processing unit (GPU). Capitalizing on the maximum computational power of such architectures (i.e., by simultaneously exploiting both the multi‐core CPU and the GPU), starting from a high‐level API, is a critical challenge. We believe that it would be highly desirable to support a simple way for programmers to realize the full potential of today's heterogeneous machines. This paper describes a compiler and runtime framework that can map a class of applications, namely those characterized bygeneralized reductions, to a system with a multi‐core CPU and GPU. Starting with simple C functions with added annotations, we automatically generate the middleware API code for the multi‐core, as well as CUDA code to exploit the GPU simultaneously. The runtime system provides efficient schemes for dynamically partitioning the work between CPU cores and the GPU. Our experimental results from two applications, for example, k‐means clustering and principal component analysis, show that, through effectively harnessing the heterogeneous architecture, we can achieve significantly higher performance compared with using only the GPU or the multi‐core CPU. In k‐means clustering, the heterogeneous version with eight CPU cores and a GPU achieved a speedup of about 32.09x relative to one‐thread CPU. When compared with the faster of CPU‐only and GPU‐only executions, we were able to achieve a performance gain of about 60%. In principal component analysis, the heterogeneous version attained a speedup of 10.4x relative to the one‐thread CPU version. When compared with the faster of CPU‐only and GPU‐only versions, the heterogeneous version achieved a performance gain of about 63.8%. Copyright © 2011 John Wiley & Sons, Ltd.
Vignesh T. Ravi, Wenjing Ma, David Chiu 0001, Gagan Agrawal
Concurr. Comput. Pract. Exp.1
2011 Porting irregular reductions on heterogeneous CPU-GPU configurations
abstract
Heterogeneous architectures are playing a significant role in High Performance Computing (HPC) today, with the popularity of accelerators like the GPUs, and the new trend towards the integration of CPUs and GPUs. Developing applications that can effectively use these architectures is a major challenge. In this paper, we focus on one of the dwarfs in the Berkeley view on parallel computing, which are the irregular applications arising from unstructured grids. We consider the problem of executing these reductions on heterogeneous architectures comprising a multi-core CPU and a GPU. We have developed a Multi-level Partitioning Framework, which has the following features: (1) it supports GPU execution of irregular reductions even when the dataset size exceeds the size of the device memory, (2) it can enable pipelining of partitioning performed on the CPU, and the computations on the GPU, and (3) it supports dynamic distribution of work between the multi-core CPU and the GPU. Our extensive evaluation using two different irregular applications demonstrates the effectiveness of our approach.
Xin Huo, Vignesh T. Ravi, Gagan Agrawal
HiPC2
2011 A dynamic scheduling framework for emerging heterogeneous systems
abstract
A trend that has materialized, and has given rise to much attention, is of the increasingly heterogeneous computing platforms. Recently, it has become very common for a desktop or a notebook computer to be equipped with both a multi-core CPU and a GPU. Application development for exploiting the aggregate computing power of such an environment is a major challenge today. Particularly, we need dynamic work distribution schemes that are adaptable to different computation and communication patterns in applications, and to various heterogeneous configurations. This paper describes a general dynamic scheduling framework for mapping applications with different communication patterns to heterogeneous architectures. We first make key observations about the architectural tradeoffs among heterogeneous resources and the communication pattern of an application, and then infer constraints for the dynamic scheduler. We then present a novel cost model for choosing the optimal chunk size in a heterogeneous configuration. Finally, based on general framework and cost model we provide optimized work distribution schemes to further improve the performance.
Vignesh T. Ravi, Gagan Agrawal
HiPC1
2011 Supporting GPU sharing in cloud environments with a transparent runtime consolidation framework
abstract
Driven by the emergence of GPUs as a major player in high performance computing and the rapidly growing popularity of cloud environments, GPU instances are now being offered by cloud providers. The use of GPUs in a cloud environment, however, is still at initial stages, and the challenge of making GPU a true shared resource in the cloud has not yet been addressed.This paper presents a framework to enable applications executing within virtual machines to transparently share one or more GPUs. Our contributions are twofold: we extend an open source GPU virtualization software to include efficient GPU sharing, and we propose solutions to the conceptual problem of GPU kernel consolidation. In particular, we introduce a method for computing the affinity score between two or more kernels, which provides an indication of potential performance improvements upon kernel consolidation. In addition, we explore molding as a means to achieve efficient GPU sharing also in the case of kernels with high or conflicting resource requirements. We use these concepts to develop an algorithm to efficiently map a set of kernels on a pair of GPUs. We extensively evaluate our framework using eight popular GPU kernels and two Fermi GPUs. We find that even when contention is high our consolidation algorithm is effective in improving the throughput, and that the runtime overhead of our framework is low.
Vignesh T. Ravi, Michela Becchi, Gagan Agrawal, Srimat T. Chakradhar
HPDC1
2011 An execution strategy and optimized runtime support for parallelizing irregular reductions on modern GPUs
abstract
GPUs have rapidly emerged as a very significant player in high performance computing. However, despite the popularity of CUDA, there are significant challenges in porting different classes of HPC applications on modern GPUs. This paper focuses on the challenges of implementing irregular applications arising from unstructured grids on modern NVIDIA GPUs. Considering the importance of irregular reductions in scientific and engineering codes, substantial effort was made in developing compiler and runtime support for parallelization or optimization of these codes in the previous two decades, with different efforts targeting distributed memory machines, distributed shared memory machines, shared memory machines, or cache performance improvement on uniprocessor machines. However, there have not been any systematic studies on parallelizing these applications on modern GPUs. There are at least two significant challenges associated with porting this class of applications on modern GPUs. The first is related to correct and efficient parallelization while using a large number of threads. The second challenge is effective use of shared memory. Since data accesses cannot be determined statically, runtime partitioning methods are needed for effectively using the shared memory. This paper describes an execution methodology that can address the above two challenges. We have also developed optimized runtime modules to support our execution methodology. Our approach and runtime methods have been extensively evaluated using two indirection array based applications.
Xin Huo, Vignesh T. Ravi, Wenjing Ma, Gagan Agrawal
ICS2
2011 GRace: a low-overhead mechanism for detecting data races in GPU programs
abstract
In recent years, GPUs have emerged as an extremely cost-effective means for achieving high performance. Many application developers, including those with no prior parallel programming experience, are now trying to scale their applications using GPUs. While languages like CUDA and OpenCL have eased GPU programming for non-graphical applications, they are still explicitly parallel languages. All parallel programmers, particularly the novices, need tools that can help ensuring the correctness of their programs. Like any multithreaded environment, data races on GPUs can severely affect the program reliability. Thus, tool support for detecting race conditions can significantly benefit GPU application developers. Existing approaches for detecting data races on CPUs or GPUs have one or more of the following limitations: 1) being illsuited for handling non-lock synchronization primitives on GPUs; 2) lacking of scalability due to the state explosion problem; 3) reporting many false positives because of simplified modeling; and/or 4) incurring prohibitive runtime and space overhead. In this paper, we propose GRace, a new mechanism for detecting races in GPU programs that combines static analysis with a carefully designed dynamic checker for logging and analyzing information at runtime. Our design utilizes GPUs memory hierarchy to log runtime data accesses efficiently. To improve the performance, GRace leverages static analysis to reduce the number of statements that need to be instrumented. Additionally, by exploiting the knowledge of thread scheduling and the execution model in the underlying GPUs, GRace can accurately detect data races with no false positives reported. Based on the above idea, we have built a prototype of GRace with two schemes, i.e., GRace-stmt and GRace-addr, for NVIDIA GPUs. Both schemes are integrated with the same static analysis. We have evaluated GRace-stmt and GRace-addr with three data race bugs in three GPU kernel functions and also have compared them with the existing approach, referred to as B-tool. Our experimental results show that both schemes of GRace are effective in detecting all evaluated cases with no false positives, whereas Btool reports many false positives for one evaluated case. On the one hand, GRace-addr incurs low runtime overhead, i.e., 22-116%, and low space overhead, i.e., 9-18MB, for the evaluated kernels. On the other hand, GRace-stmt offers more help in diagnosing data races with larger overhead.
Mai Zheng, Vignesh T. Ravi, Gagan Agrawal
PPoPP2
2010 A Map-Reduce System with an Alternate API for Multi-core Environments
abstract
Map-reduce framework has received a significant attention and is being used for programming both large-scale clusters and multi-core systems. While the high productivity aspect of map-reduce has been well accepted, it is not clear if the API results in efficient implementations for different subclasses of data-intensive applications. In this paper, we present a system MATE (Map-reduce with an Alternate API), that provides a high-level, but distinct API. Particularly, our API includes a programmer-managed reduction object, which results in lower memory requirements at runtime for many data-intensive applications. MATE implements this API on top of the Phoenix system, a multi-core map-reduce implementation from Stanford. We evaluate our system using three data mining applications, and compare its performance to that of both Phoenix and Hadoop. Our results show that for all the three applications, MATE outperforms Phoenix and Hadoop. Despite achieving good scalability, MATE also maintains the easy-to-use API of map-reduce. Overall, we argue that, our approach, which is based on the generalized reduction structure, provides an alternate high-level API, leading to more efficient and scalable implementations.
Wei Jiang 0037, Vignesh T. Ravi, Gagan Agrawal
CCGRID2
2010 Approaches for parallelizing reductions on modern GPUs
abstract
GPU hardware and software has been evolving rapidly. CUDA versions 1.1 and higher started supporting atomic operations on device memory, and CUDA versions 1.2 and higher started supporting atomic operations on shared memory. This paper focuses on parallelizing applications involving reductions on GPUs. Prior to the availability of support for locking, these applications could only be parallelized using full replication, i.e., by creating a copy of the reduction object for each thread. However, CUDA 1.1 (1.2) onwards, use of atomic operations (on shared memory) is another option, though some effort is still required in supporting locking on floating point numbers and for supporting coarse-grained locking. Based on the tradeoffs between locking and full replication, we also introduce a hybrid approach, in which a group of threads use atomic operations to update one copy of the reduction object. Using three data mining algorithms that follow the reduction structure - k-means clustering, Principal Component Analysis (PCA) and k-nearest neighbor search (kNN), we evaluate the relative performance of these three approaches. We show how the relative performance of these techniques can vary depending upon the application and its parameters. The hybrid approach we have introduced clearly outperforms other approaches in several cases.
Xin Huo, Vignesh T. Ravi, Wenjing Ma, Gagan Agrawal
HiPC2
2010 Compiler and runtime support for enabling generalized reduction computations on heterogeneous parallel configurations
abstract
A trend that has materialized, and has given rise to much attention, is of the increasingly heterogeneous computing platforms. Presently, it has become very common for a desktop or a notebook computer to come equipped with both a multi-core CPU and a GPU. Capitalizing on the maximum computational power of such architectures (i.e., by simultaneously exploiting both the multi-core CPU and the GPU) starting from a high-level API is a critical challenge. We believe that it would be highly desirable to support a simple way for programmers to realize the full potential of today's heterogeneous machines.
Vignesh T. Ravi, Wenjing Ma, David Chiu 0001, Gagan Agrawal
ICS1
2009 Performance Issues in Parallelizing Data-Intensive Applications on a Multi-core Cluster
abstract
The deluge of available data for analysis demands the need to scale the performance of data mining implementations. With the current architectural trends, one of the major challenges today is achieving programmability and performance for data mining applications on multi-core machines and cluster of multi-core machines. To address this problem, we have been developing a runtime framework, FREERIDE, that enables parallel execution of data mining and data analysis tasks.The contributions of this paper are two-fold: 1) this paper describes and evaluates various shared-memory parallelization techniques developed in our run-time system on a cluster of multi-cores, and 2) we report on a detailed performance study to understand why certain parallelization techniques outperform other techniques for a particular application.
Vignesh T. Ravi, Gagan Agrawal
CCGRID1
2009 Comparing map-reduce and FREERIDE for data-intensive applications
abstract
Map-reduce has been a topic of much interest in the last 2-3 years. While it is well accepted that the map-reduce APIs enable significantly easier programming, the performance aspects of the use of map-reduce are less well understood. This paper focuses on comparing the map-reduce paradigm with a system that was developed earlier at Ohio State, FREERIDE (FRamework for Rapid Implementation of Datamining Engines). The API and the functionality offered by FREERIDE has many similarities with the map-reduce API. However, there are some differences in the API. Moreover, while FREERIDE was motivated by data mining computations, map-reduce was motivated by searching, sorting, and related applications in a data-center. We compare the programming APIs and performance of the Hadoop implementation of map-reduce with FREERIDE. For our study, we have taken three data mining algorithms, which are k-means clustering, apriori association mining, and k-nearest neighbor search. We have also included a simple data scanning application, word-count. The main observations from our results are as follows. For the three data mining applications we have considered, FREERIDE outperformed Hadoop by a factor of 5 or more. For word-count, Hadoop is better by a factor of up to 2. With increasing dataset sizes, the relative performance of Hadoop becomes better. Overall, it seems that Hadoop has significant overheads related to initialization, I/O, and sorting of (key, value) pairs. Thus, despite an easy to program API, Hadoop's map-reduce does not appear very suitable for data mining computations on modest-sized datasets.
Wei Jiang 0037, Vignesh T. Ravi, Gagan Agrawal
CLUSTER2
2009 Supporting load balancing for distributed data-intensive applications
abstract
In data-intensive computing, an important problem that has received relatively little attention is of transparent processing of data stored in remote data repositories. Interesting load balancing considerations arise for these scenarios. Particularly, based on where data is generated and how it is shared, a dataset of interest can be divided across multiple data repositories, which may be geographically distributed and the data may be partitioned in a number of ways. This paper focuses on enabling such distributed processing of data from distributed resources. We have developed a load balancing algorithm, which minimizes the total time spent on processing the data. We consider weighted sum of two factors, a load balancing factor and a term that captures the amount of time spent by processing nodes waiting for the data. Our solutions have been implemented and evaluated in the context of FREERIDE-G (FRamework for Rapid Implementation of Datamining Engines in Grid). We have extensively evaluated our techniques using two data-intensive applications.
Leonid Glimcher, Vignesh T. Ravi, Gagan Agrawal
HiPC2
2009 Integrating and optimizing transactional memory in a data mining middleware
abstract
As the size of available datasets in various domains is growing rapidly, there is an increasing need for scaling data mining implementations. Coupled with the current trends in computer architecture, where scaling only seems possible with effective utilization of the increasing number of cores, this is leading to a programmability and performance challenge for data mining applications on emerging multi-core architectures. Recently, Software Transactional memory (STM) has been gaining popularity as a viable tool for easing programmability on shared memory machines. This paper focuses on utilizing, optimizing, and evaluating STM for data mining applications on multi-core architectures. The specific contributions of this paper are three-fold: (1) An existing STM algorithm (Transactional Locking II) has been integrated with a parallel data mining middleware, FREERIDE. This enables transparent use of the STM technique by any application developed using this middleware. (2) We have developed a new Hybrid Replication- Transactional Memory scheme, which substantially reduces the memory overhead of a replication scheme, while also reducing the number of conflicts and aborts in the STM technique, and (3) We have performed a comprehensive performance evaluation of STM techniques, where they have been compared with a replication-based scheme (which may not be scalable with increasing number of cores), and a highly optimized locking scheme. Our results show that, both STM and HyRepSTM techniques are competitive with other schemes in most cases. Also, the Hybrid Replication-Transactional memory scheme substantially reduces the number of aborts and conflicts when the number of concurrent threads are high.
Vignesh T. Ravi, Gagan Agrawal
HiPC1