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R. Stockton Gaines

dblp:71/973 · DBLP profile ↗
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3ranked-venue papers
2as first author
0since 2021 · last 1993
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1 · 1 first-authorDatabases, data management, data science and information retrieval · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Performance modeling and evaluation · 46% Memory systems · 46% Interconnection networks and networks-on-chip · 7%
Software engineering, system software, and programming languages
1 paper
Operating systems · 100%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Performance modeling and evaluation
benchmarking
0.011993
Micro benchmark analysis of the KSR1 · SC 1993
Memory systems
cache
0.011993
Micro benchmark analysis of the KSR1 · SC 1993
Performance modeling and evaluation › benchmarking
microbenchmarking
0.011993
Micro benchmark analysis of the KSR1 · SC 1993
Memory systems
shared memory
0.011993
Micro benchmark analysis of the KSR1 · SC 1993
Interconnection networks and networks-on-chip
ring network
0.011993
Micro benchmark analysis of the KSR1 · SC 1993
Operating systems
system architecture
0.011971
An Operating System Based on the Concept of a Supervisory Computer (Abstract) · SOSP 1971

Methods — techniques the papers use, named apart from their topics

microbenchmarks · 0.0
YearPublicationVenuePosition
1993 Micro benchmark analysis of the KSR1
abstract
A new approach, micro benchmarks, has recently been developed. Using this technique, we have analyzed the KSR1, and in particular the "ALLCACHE" memory architecture and ring interconnection. We have been able to elucidate many facets of memory performance. The technique has enabled us to identify and characterize parts of the memory design not described by Kendall Square Research. Our results show that a miss in the local cache can incur a penalty ranging from 7.5 microseconds to 500 microseconds (when a dirty "page" in the local cache must be evicted). The programmer must be very careful in placement and accessing of data to obtain maximum performance from the KSR1; the data presented here will help in understanding the performance actually obtained. 1. Introduction The KSR1 from Kendall Square Research is a novel new parallel computer. It is the first commercial machine embodying a scalable all cache form of shared memory architecture. In addition, there are a number of other inter...
Rafael H. Saavedra, R. Stockton Gaines, Michael J. Carlton
SC2
1976 Papers from the International Conference on Very Large Data Bases, September 22-24, 1975, Framingham, Massachusetts
R. Stockton Gaines, David K. Hsiao
ACM Trans. Database Syst.1
1971 An Operating System Based on the Concept of a Supervisory Computer (Abstract)
abstract
This paper appears in the March, 1972, issue of the Communications of the ACM. Its abstract is reproduced below.
R. Stockton Gaines
SOSP1