The use of formal models to describe early versions of the structure and the behavior of a system has become common practice in industry. UML and OCL are the de-facto specification languages for these tasks. They allow for capturing system properties and module behavior in an abstract but still formal fashion. At the same time, this enables designers to detect errors or inconsistencies in the initial phases of the design flow-even if the implementation has not already started. Corresponding tools for verification of formal models got established in the recent past. However, verification results are usually not reused in later design steps anymore. In fact, similar verification tasks are applied again, e.g., after the implementation has been completed. This is a waste of computational and human effort. In this paper, we address this problem by proposing a method which checks a given implementation of a system against its corresponding formal method. This allows for transferring verification results already obtained from the formal model to the implementation and, eventually, motivates a new design flow which addresses verification across abstraction levels. This paper describes the applied techniques as well as their orchestration. Afterwards, the applicability of the proposed methodology is demonstrated by means of examples as well as a case study from an industrial context.

The increasing complexity of current wireless sensor networks requires efficient methodologies to fulfill the strict constraints typically imposed in terms of power consumption and system performance. Furthermore, security issues are also becoming key features due to their impact on system behavior. As a consequence, new design frameworks are required to enable developers to model and address security risks from the very beginning of the WSN design process, while optimizing system performance. For this purpose, this article presents a design framework for modeling and simulating WSNs under external attacks. In this framework, the WSN is specified by using UML/MARTE models, from which automatic code generation enables fast, host-compiled simulation. The resulting information enables early detection of weaknesses in WSN designs and simplifies further exploration of design solutions. Minor modifications in the UML models are sufficient to automatically simulate and evaluate each design alternative in an iterative way. As a result, designers can develop more secure and optimized WSN systems with reduced design times and effort.

This paper presents our performance profiling and the optimizations made to the program presented in the MEMOCODE SW design contest to make it faster when running in the Raspberry-Pi platform.

During the last years, Wireless Sensor Networks (WSN) have been deployed at an accelerated rate. The complexity and low-power requirements of these networks have also been growing. Therefore, WSN developers are beginning to require efficient methodologies for network simulation and embedded SW performance analysis. These tools should also include security analysis. This security analysis has to evaluate the vulnerability of a WSN to the wide variety of attacks that these networks could suffer. WSN attacks could also affect power consumption and performance of the node's software, thus security analysis has to be integrated into a complete performance analysis framework. This work proposes a methodology to simulate the most common and dangerous attacks that a WSN can suffer nowadays. The impact of these attacks on power consumption and software execution time are also analyzed. This provides developers with important information about the effects that one or multiple attacks could have on the WSN, helping them to develop more secure software.

The design of multimedia systems is becoming more and more challenging due to their growing complexity and strict performance requirements. New implementations fulfilling new market requirements must be included in increasingly complex multimedia systems. In this context, the OpenMAX standard provides abstraction facilities needed in order to design multimedia streaming applications with large amounts of data processing. This paper presents a methodology which provides a UML/MARTE methodology for the specification of multimedia systems according to the OpenMAX specification requirements for system level-design activities and a framework which automates the extraction of the corresponding SystemC executable specification, enabling the execution and the verification of the multimedia system.

This paper presents a prototype for a virtual platform to estimate performance of OpenMP parallelized programs in shared-memory many-core platforms at early stages of the design flow. This is a challenging problem because, at these stages, the particular details of the final platform are unknown, but early performance estimations are needed to choose between different parallel implementations. The tool presented enables fast modelling of the SW and HW components in a complete platform model and also has the advantage of enabling configurable models of any many-core platform. This can be achieved because of two novel ideas that are explained in this paper: a native simulation framework that enables the modelling of concurrent threads described in OpenMP and a novel use of "shared" and "private" clauses that models the data transfers. The advantages of using the proposed tool are explained with a specific example.

In this paper is presented a complete, fast and accurate Wireless Sensor Network simulation framework. With an emerging market in Wireless Sensor Network technology, where competition is getting increasingly stiffer, it is important to shorten the time-to-market if you want to be competitive. This is the main reason why it is proposed a complete simulation framework with new features other tools do not provide. Thanks to this simulation framework, developers can simulate a complete wireless network with the definition of a hardware platform and an application for each node. Moreover, this simulator framework allows an RTOS to be included in each node. The simulator framework provides performance and power consumption estimations that take into account the impact of the different decisions and alternatives chosen during application and hardware platform design and development.

The main goal of this work is to present a parallelization methodology oriented to shared memory many-core platforms. There are two important elements in the proposed method that facilitate the design process. One is the use of OpenMP as a programming paradigm since it is oriented to a shared memory environment. The other is the use of a virtual platform that enables the evaluation of performance and task execution time before a real hardware prototype is available and also helps in the design space exploration of generalized and configurable target platforms.