VLDB 2026 Research / reviewers in the wild / expert
Jaswanth Sreeram
dblp:72/1049
· DBLP profile ↗
8ranked-venue papers
4as first author
0since 2021 · last 2015
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 5 · 3 first-authorSoftware engineering, systems software and programming languages · 3 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
3 papers |
Parallel and multicore computing · 53% Cloud and datacenter computing · 19% Performance modeling and evaluation · 15% | |
| Software engineering, system software, and programming languages
3 papers |
Concurrent programming · 48% Empirical software engineering · 22% Programming languages and type systems · 16% |
Topics — the 12 heaviest of 12, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Parallel and multicore computing
parallel programming models |
0.4 | 2 | 2015 | Are web applications ready for parallelism? · PPoPP 2015 River trail: a path to parallelism in JavaScript · OOPSLA 2013 |
Parallel and multicore computing
data parallelism |
0.2 | 1 | 2015 | Are web applications ready for parallelism? · PPoPP 2015 |
Cloud and datacenter computing › datacenter services › online service systems › internet services
web applications |
0.2 | 1 | 2015 | Are web applications ready for parallelism? · PPoPP 2015 |
Concurrent programming
transactional memory |
0.1 | 1 | 2012 | Safe compiler-driven transaction checkpointing and recovery · OOPSLA 2012 |
Electronic design automation
design optimization |
0.1 | 1 | 2007 | A profile-driven statistical analysis framework for the design optimization of soft real-time applications · ESEC/SIGSOFT FSE 2007 |
Performance modeling and evaluation
profiling |
0.1 | 1 | 2007 | A profile-driven statistical analysis framework for the design optimization of soft real-time applications · ESEC/SIGSOFT FSE 2007 |
Embedded and real-time systems
soft real-time systems |
0.1 | 1 | 2007 | A profile-driven statistical analysis framework for the design optimization of soft real-time applications · ESEC/SIGSOFT FSE 2007 |
Performance modeling and evaluation
workload characterization |
0.1 | 1 | 2007 | A profile-driven statistical analysis framework for the design optimization of soft real-time applications · ESEC/SIGSOFT FSE 2007 |
Empirical software engineering
developer studies |
0.1 | 1 | 2015 | Are web applications ready for parallelism? · PPoPP 2015 |
Programming languages and type systems › dynamic languages
javascript |
0.0 | 1 | 2013 | River trail: a path to parallelism in JavaScript · OOPSLA 2013 |
Compilers and program optimization › compiler optimization
compiler-directed optimization |
0.0 | 1 | 2012 | Safe compiler-driven transaction checkpointing and recovery · OOPSLA 2012 |
Performance modeling and evaluation
statistical analysis |
0.0 | 1 | 2007 | A profile-driven statistical analysis framework for the design optimization of soft real-time applications · ESEC/SIGSOFT FSE 2007 |
Methods — techniques the papers use, named apart from their topics
survey · 0.4performance characterization · 0.4statistical analysis · 0.1offline profiling · 0.1context execution tree · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2015 | Are web applications ready for parallelism?abstractIn recent years, web applications have become pervasive. Their backbone is JavaScript, the only programming language supported by all major web browsers. Most browsers run on desktop or mobile devices with parallel hardware. However, JavaScript is by design sequential, and current web applications make little use of hardware parallelism. Are web applications ready to exploit parallel hardware? We answer the question in two steps: First, we survey 174 web developers about the potential and challenges of using parallelism. Then, we study the performance and computation shape of a set of web applications that are representative for the emerging web. Our findings indicate that emerging web applications do have latent data parallelism, and JavaScript developers' programming style is not a significant impediment to exploiting this parallelism. Cosmin Radoi, Stephan Herhut, Jaswanth Sreeram, Danny Dig |
PPoPP | 3 |
| 2013 | River trail: a path to parallelism in JavaScriptabstractJavaScript is the most popular language on the web and is a crucial component of HTML5 applications and services that run on consumer platforms ranging from desktops to phones. However, despite ample amount of hardware parallelism available to web applications on such platforms, JavaScript web applications remain predominantly sequential. Common parallel programming solutions accepted by other programming languages failed to transfer themselves to JavaScript due to differences in programming models, the additional requirements of the web and different developer expectations. Stephan Herhut, Richard L. Hudson, Tatiana Shpeisman, Jaswanth Sreeram |
OOPSLA | 4 |
| 2012 | Hybrid Transactions: Lock Allocation and Assignment for IrrevocabilityabstractIrrevocable Software Memory Transactions provide a safe way to perform certain unrecoverable operations such as I/O or system calls inside transactions. In this paper we show that this notion of irrevocability has strong relevance and impact on the performance and throughput of a transactional program. In this paper we propose a compile-time analysis and transactional memory runtime system that allows several irrevocable transactions to execute concurrently with normal revocable transactions unlike state-of-the-art methods that allow for at most one irrevocable transaction at a time. Our approach uses a compile-time analysis to derive a fine-grained lock-assignment scheme using a precise context-sensitive data structure analysis that is able to identify disjoint logical data structures. We describe the prototype implementation of our system in the LLVM compiler and TL2 STM system and evaluate the parallel performance of our system on high-contention transactional programs in the STAMP suite. Jaswanth Sreeram, Santosh Pande |
IPDPS | 1 |
| 2012 | Safe compiler-driven transaction checkpointing and recoveryabstractSeveral studies have shown that a large fraction of the work performed inside memory transactions in representative programs is wasted due to the transaction experiencing a conflict and aborting. Aborts inside long running transactions are especially influential to performance and the simplicity of the TM programming model (relative to using finegrained locking) in synchronizing large critical sections means that large transactions are common and this exacerbates the problem of wasted work. In this paper we present a practical transaction checkpoint and recovery scheme in which transactions that experience a conflict can restore their state (including the local context in which they were executing) to some dynamic program point before this access and begin execution from that point. This state saving and restoration is implemented by checkpoint operations that are generated by a compiler into the transaction's body and are also optimized to reduce the amount of state that is saved and restored. We also describe a runtime system that manages these checkpointed states and orchestrates the restoration of the right checkpointed state for a conflict on a particular transactional access. Moreover the synthesis of these save and restore operations, their optimization and invocation at runtime are completely transparent to the programmer. We have implemented the checkpoint generation and optimization scheme in the LLVM compiler and runtime support for the TL2 STM system. Our experiments indicate that for many parallel programs using such checkpoint recovery schemes can result in upto several orders of magnitude reduction in number of aborts and significant execution time speedups relative to plain transactional programs for the same number of threads. Jaswanth Sreeram, Santosh Pande |
OOPSLA | 1 |
| 2011 | Parallelizing a Real-Time Physics Engine Using Transactional Memory
Jaswanth Sreeram, Santosh Pande |
Euro-Par (2) | 1 |
| 2011 | Enriching 3-D Video Games on MulticoresabstractThe introduction of multicore processors on desktops and other personal computing platforms has given rise to multiple interesting end-user application possibilities. One important trend is the increased presence of resource hungry applications like gaming and multimedia applications. One of the key distinguishing factors of these applications is that they are amenable to variable semantics (ie, multiple possibilities of results) unlike traditional applications wherein a fixed, unique answer is expected. For example, varying degrees of image processing improves picture quality, different model complexities used in game physics allow different degrees of realism during game play, and so on. The goal of this paper is to demonstrate that scalable semantics in applications such as video games can be enriched with optional tasks that can be launched and thus adapt to the amount of available resources at runtime. We propose a C/C++ API that allows the programmer to define how the current semantics of a program can be opportunistically enriched, as well as the underlying runtime system that orchestrates the different computations We show how this infrastructure can be used to enrich a well known game called Quake 3. Our results show that it is possible to perform significant enrichment without degrading the application's performance by utilizing additional cores. Romain Cledat, Tushar Kumar, Jaswanth Sreeram, Santosh Pande |
IPDPS | 3 |
| 2007 | RSTM : A Relaxed Consistency Software Transactional Memory for Multicores
Jaswanth Sreeram, Romain Cledat, Tushar Kumar, Santosh Pande |
PACT | 1 |
| 2007 | A profile-driven statistical analysis framework for the design optimization of soft real-time applicationsabstractSoft real-time applications lack a formal methodology for their design optimization. Well-established techniques from hard real-time systems cannot be directly applied to soft real-time applications, without losing key benefits of the soft real-time paradigm. We introduce a statistical analysis framework that is well-suited for discovering opportunities for optimization of soft real-time applications. We demonstrate how programmers can use the analysis provided by our framework to perform aggressive soft real-time design optimizations on their applications. The paper introduces the Context Execution Tree (CET) representation for capturing the statistical properties of function calls in the context of their execution in the program. The CET is constructed from an offline-profile of the application. Statistical measures are coupled with techniques that extract runtime distinguishable call-chains. This combination of techniques is applied to the CET to find statistically significant patterns of activity that i) expose slack in the execution of the application with respect to its soft real-time requirements, and ii) can be predicted with low overhead and high reliability during the normal execution of the application. Tushar Kumar, Jaswanth Sreeram, Romain Cledat, Santosh Pande |
ESEC/SIGSOFT FSE | 2 |