A high-driving class-AB buffer amplifier, which consists of a high-gain input stage and a pseudo source follower, is proposed. The pseudo source follower consists of two same types of differential pairs rather than two complementary error amplifiers. The high-driving capability is mainly provided by the folded amplifiers. An experimental prototype buffer amplifier implemented in a 0.35-μm CMOS technology demonstrates that the circuit dissipates an average static power consumption of only 660 μW at a power supply of 3.3 V, and exhibits the slew rates of 2.7 V/μs and 3.8 V/μs for the rising and falling edges, respectively, under a 300Ω/150 pF load. The second and third harmonic distortions (HD2 and HD3) are −67 dB and −65 dB, respectively, at 20 KHz under the same load.

A new multiple-sequence generator scheme to generate a set of deterministic ordered sequence of patterns followed by random patterns is presented in this paper. This scheme is based on an inverted nonlinear autonomous machine which utilizes a two-dimension-like LFSR with nonlinear inverters. A systematic procedure is also presented to obtain the autonomous machine which is more regular in the structure and utilizes less hardware. The generated deterministic sequence of patterns, which may have ordered and repeated patterns, and the random patterns are applicable to sequential circuit testing.

In this paper, a programmable multiple-sequence generation scheme, which is constructed from a two-dimension-like feedback shift register structure, to generate a set of deterministic sequence of vectors followed by pseudo-random vectors is presented. A sequence segmentation method is employed to handle a long sequence of vectors. The proposed scheme has a regular structure, and the sequences so generated are more efficient in detecting faults for sequential circuit testing, stuck-open fault testing and delay fault testing. Hence, it is very suitable for the BIST application for MCM testing.