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Randy Wachal

dblp:72/30 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2015
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 61% Integrated circuit design · 39%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Embedded and real-time systems › control systems
control architecture
0.212015
Control Architecture for High Power Electronics Converters · Proc. IEEE 2015
Embedded and real-time systems › control systems
hierarchical control
0.212015
Control Architecture for High Power Electronics Converters · Proc. IEEE 2015
Integrated circuit design
power electronics
0.212015
Control Architecture for High Power Electronics Converters · Proc. IEEE 2015
Integrated circuit design › power electronics
power converters
0.112015
Control Architecture for High Power Electronics Converters · Proc. IEEE 2015
YearPublicationVenuePosition
2015 Control Architecture for High Power Electronics Converters
abstract
When the control functions of various types of power electronics systems are examined, a significant degree of common functionality emerges, irrespective of the target application. It is possible to define hierarchical control architectures for these systems using common interface definitions between control system divisions or layers. Such definitions enable the use of common designs for multiple applications and the use of commercially available electronics and communications modules allowing cost reduction in power electronics applications. This paper presents various partitioning strategies of a hierarchical control architecture for use in high power electronics control systems and defines various parameters/functions that need to be handled within each layer, and those that need to be communicated between the layers. Each layer has characteristic processing and communication speed requirements, irrespective of the final applications.
Herbert L. Ginn, Narain G. Hingorani, Joseph R. Sullivan, Randy Wachal
Proc. IEEE4