Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Rudrajit Samanta

dblp:72/870 · DBLP profile ↗
← Back
2ranked-venue papers
1as first author
0since 2021 · last 2001
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-authorGraphics, computer vision, multimedia, augmented reality and games · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 56% High-performance computing · 28% Interconnection networks and networks-on-chip · 17%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
cache coherence
0.011998
Home-Based SVM Protocols for SMP Clusters: Design and Performance · HPCA 1998
Memory systems › virtual memory management
shared virtual memory
0.011998
Home-Based SVM Protocols for SMP Clusters: Design and Performance · HPCA 1998
High-performance computing › cluster computing
SMP cluster
0.011998
Home-Based SVM Protocols for SMP Clusters: Design and Performance · HPCA 1998
Interconnection networks and networks-on-chip › cluster interconnect
myrinet
0.011998
Home-Based SVM Protocols for SMP Clusters: Design and Performance · HPCA 1998
Interconnection networks and networks-on-chip
network interface
0.011998
Home-Based SVM Protocols for SMP Clusters: Design and Performance · HPCA 1998

Methods — techniques the papers use, named apart from their topics

simulation · 0.0implementation · 0.0
YearPublicationVenuePosition
2001 Data distribution strategies for high-resolution displays
Yuqun Chen, Adam Finkelstein, Thomas A. Funkhouser, Kai Li 0001, Zhiyan Liu, Rudrajit Samanta, Grant Wallace
Comput. Graph.7
1998 Home-Based SVM Protocols for SMP Clusters: Design and Performance
abstract
As small-scale shared memory multiprocessors proliferate in the market, it is very attractive to construct large-scale systems by connecting smaller multiprocessors together in software using efficient commodity, network interfaces and networks. Using a shared virtual memory (SVM) layer for this purpose preserves the attractive shared memory programming abstraction across nodes. In this paper: We describe home-based SVM protocols that support symmetric multiprocessor (SMP) nodes, taking advantage of the intra-node hardware cache coherence and synchronization mechanisms. Our protocols take no special advantage of the network interface and network except as a fast communication link, and as such are very portable. We present the key design tradeoffs, discuss our choices, and describe key data structures that enable us to implement these choices quite simply. We present an implementation on a network of 4-way Intel PentiumPro SMPs interconnected with Myrinet, and provide performance results. We explore the advantages of SMP nodes over uniprocessor nodes with this protocol, as well as other performance tradeoffs, through both real implementation and simulation as appropriate, since both have important roles to play. We find one approach to deliver good parallel performance on many real applications (at least at the scale we examine) and to improve performance over SVM across uniprocessor nodes.
Rudrajit Samanta, Angelos Bilas, Liviu Iftode, Jaswinder Pal Singh
HPCA1