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H. Rombeek

dblp:73/10972 · DBLP profile ↗
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3ranked-venue papers
0as first author
0since 2021 · last 1978
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 100%
Computer graphics and multimedia
1 paper
Image and video coding · 77% Image and video processing · 23%

Topics — the 7 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › physical design › layout verification
design rule checking
0.011978
Design rule verification based on one dimensional scans · DAC 1978
Electronic design automation
physical design
0.011978
Design rule verification based on one dimensional scans · DAC 1978
Electronic design automation › hardware verification and test
fault simulation
0.011976
F/LOGIC - An interactive fault and logic simulator for digital circuits · DAC 1976
Electronic design automation › hardware verification and test
logic simulation
0.011976
F/LOGIC - An interactive fault and logic simulator for digital circuits · DAC 1976
Electronic design automation › hardware verification and test
test generation
0.011976
F/LOGIC - An interactive fault and logic simulator for digital circuits · DAC 1976
Image and video coding
bandwidth compression
0.011972
A Video Simulation Facility · IEEE Trans. Computers 1972
Image and video processing › real-time image processing
real-time video processing
0.011972
A Video Simulation Facility · IEEE Trans. Computers 1972

Methods — techniques the papers use, named apart from their topics

scan rate conversion · 0.0one-dimensional scan · 0.0digital computer simulation · 0.0
YearPublicationVenuePosition
1978 Design rule verification based on one dimensional scans
Philip S. Wilcox, H. Rombeek, D. M. Caughey
DAC2
1976 F/LOGIC - An interactive fault and logic simulator for digital circuits
abstract
Digital simulators are becoming a standard and necessary CAD tool in the circuit design process. The acceptance of this design aid is a result of a number of factors, the predominant one being the over-whelming size and complexity of present day logic circuits and the requirement that a complete test plan be developed for these circuits. Another factor is that recent generation logic simulators have proven to be very flexible tools, capable of simulating very large circuits with a high degree of precision.
Philip S. Wilcox, H. Rombeek
DAC2
1972 A Video Simulation Facility
abstract
A system for simulating video bandwidth compression techniques is described. The simulation facility accepts up to 10 s of real-time video and slows the scan rate so that this information can be converted for storage and processing on a digital computer. The processed information is then converted back to real-time video for visual evaluation.
R. W. McCaughern, D. M. Caughey, H. Rombeek, W. S. Davidson
IEEE Trans. Computers3