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Ashif S. Harji

dblp:74/6350 · DBLP profile ↗
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6ranked-venue papers
1as first author
0since 2021 · last 2012
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 1 first-authorSoftware engineering, systems software and programming languages · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
2 papers
Concurrent programming · 85% Programming languages and type systems · 10% Operating systems · 5%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Cloud and datacenter computing · 77% Performance modeling and evaluation · 23%

Topics — the 6 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Cloud and datacenter computing › datacenter services › online service systems › internet services
web server architecture
0.112007
Comparing the performance of web server architectures · EuroSys 2007
Concurrent programming › synchronization
monitors
0.112005
Implicit-signal monitors · ACM Trans. Program. Lang. Syst. 2005
Concurrent programming
synchronization
0.112005
Implicit-signal monitors · ACM Trans. Program. Lang. Syst. 2005
Performance modeling and evaluation
benchmarking
0.012007
Comparing the performance of web server architectures · EuroSys 2007
Programming languages and type systems
language design
0.012005
Implicit-signal monitors · ACM Trans. Program. Lang. Syst. 2005
Operating systems › resource management › process management › CPU scheduling
real-time scheduling
0.012000
Object-oriented real-time concurrency · OOPSLA 2000

Methods — techniques the papers use, named apart from their topics

simulation · 0.1
YearPublicationVenuePosition
2012 Comparing high-performance multi-core web-server architectures
abstract
In this paper, we study how web-server architecture and implementation affect performance when trying to obtain high throughput on a 4-core system servicing static content. We focus on static content as a growing numbers of servers are dedicated to workloads comprised of songs, photos, software, and videos chunked for HTTP downloads. Two representative static-content workloads are used: one serviced entirely from the file-system cache and the other requires significant disk I/O. We focus on 4-core systems as: 1) it is a widely used configurations in data-centers and cloud services, 2) recent studies show large SMP systems may operate more efficiently when subdivided into smaller subsystems, 3) understanding performance with a smaller number of cores is essential before scaling to a larger number of cores, 4) and 4-cores may be sufficient for many web servers.
Ashif S. Harji, Peter A. Buhr, Tim Brecht
SYSTOR1
2007 Comparing the performance of web server architectures
abstract
In this paper, we extensively tune and then compare the performance of web servers based on three different server architectures. The μserver utilizes an event-driven architecture, Knot uses the highly-efficient Capriccio thread library to implement a thread-per-connection model, and WatPipe uses a hybrid of events and threads to implement a pipeline-based server that is similar in spirit to a staged event-driven architecture (SEDA) server like Haboob.
David Pariag, Tim Brecht, Ashif S. Harji, Peter A. Buhr, Amol Shukla, David R. Cheriton
EuroSys3
2005 Solution Space for Fixed-Priority with Preemption Threshold
abstract
This paper reaffirms that fixed-priority with preemption threshold (FPPT) is an important form of real-time scheduling algorithm, which fills the gap between fixed-priority preemptive (FPP) and fixed-priority nonpreemptive (FPNP). When a task set is schedulable by FPPT, there may exist multiple valid preemption threshold assignments, which provide useful scheduling options. All valid assignments form a solution space that is delimited by a minimal and maximal assignment. A mechanism is presented to generate part of the valid assignments once the minimal and maximal assignments are known. The known algorithm to compute the minimal assignment starts at FPP, and the known algorithm to compute the maximal assignment starts from any valid assignment. This paper presents algorithms to compute the minimal and maximal assignments starting from FPNP, and the proofs for the correctness of these algorithms are also presented.
Jiongxiong Chen, Ashif S. Harji, Peter A. Buhr
IEEE Real-Time and Embedded Technology and Applications Symposium2
2005 Concurrent urban legends
abstract
This discussion addresses a number of urban legends about concurrency in an attempt to separate the myth from the fact. These legends are as follows: 1 concurrent = parallel; 2 coroutining = concurrency; 3 synchronization = mutual exclusion; 4 Dekker < Peterson; 5 concurrency = library; 6 inheritance anomaly = major concurrency problem; 7 signalling = hints; 8 spurious wakeup = efficiency. Identifying and understanding the fundamental concepts underlying concurrency is essential to the field. Equally important is not to confuse sequential and concurrent concepts. Finally, approaches based solely on efficiency are insufficient to justify a weak or difficult to use concurrent concept or construct. Copyright © 2005 John Wiley & Sons, Ltd.
Peter A. Buhr, Ashif S. Harji
Concurr. Pract. Exp.2
2005 Implicit-signal monitors
abstract
An implicit (automatic) signal monitor uses a waituntil predicate statement to construct synchronization, as opposed to an explicit-signal monitor using condition variables and signal/wait statements for synchronization. Of the two synchronization approaches, the implicit-signal monitor is often easier to use and prove correct, but has an inherently high execution cost. Hence, its primary use is for prototyping concurrent systems using monitors, where speed and accuracy of software development override execution performance. After a concurrent system is working, any implicit-signal monitor that is a performance bottleneck can be converted to an explicit-signal monitor. Unfortunately, many monitor-based concurrency systems provide only explicit-signal monitors, precluding the design benefits of implicit-signal monitors.This article presents a historical look at the development of the implicit-signal monitor in relation to its counterpart the explicit-signal monitor. An analysis of the different kinds of implicit-signal monitors shows the effects certain design decisions have on the problems that can be solved and the performance of the solutions. Finally, an extensive discussion is presented on simulating an implicit-signal monitor via different explicit-signal monitors. These simulations are reasonably complex, depending on the kind of explicit-signal monitor available for the simulation and the desired semantics required for the implicit-signal monitor. Interestingly, the complexity of the simulations also illustrates certain deficiencies with explicit-signal monitors, which are discussed in detail. Performance comparisons are made among the different simulations with monitors from the concurrent systems PThreads, Java, and μC++.
Peter A. Buhr, Ashif S. Harji
ACM Trans. Program. Lang. Syst.2
2000 Object-oriented real-time concurrency
abstract
The primary goal of a real-time system is predictability. Achieving this goal requires all levels of the system to work in concert to provide fixed worst-case execution-times. Un-fortunately, many real-time systems are overly restrictive, providing only ad-hoc scheduling facilities and basic concurrent functionality. Ad-hoc scheduling makes developing, verifying, and maintaining a real-time system extremely difficult and time consuming. Basic concurrent functionality forces programmers to develop complex concurrent programs without the aid of high-level concurrency features.Encouraging the use of sophisticated real-time theory and methodology, in conjunction with high-level concurrency features, requires flexibility and extensibility. Giving real-time programmers access to the underlying system data-structures makes it possible to interact with the system to incorporate new ideas and fine-tune specific applications. This paper explores this approach by examining its effect on a selection of crucial real-time issues: real-time monitors, timeouts, dynamic-priority scheduling and basic priority inheritance. The approach is implemented in μC++.
Peter A. Buhr, Ashif S. Harji, Philipp E. Lim, Jiongxiong Chen
OOPSLA2