Demo Data from VLDB 2026 / reviewers in the wild / expert
Chun Wah Wallace Wu
dblp:75/11343
· DBLP profile ↗
4ranked-venue papers
1as first author
0since 2021 · last 2014
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 3 · 1 first-authorSystems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Embedded and real-time systems · 84% Reconfigurable computing and FPGAs · 9% GPUs and heterogeneous computing · 8% | |
| Software engineering, system software, and programming languages
1 paper |
Program verification · 62% Program analysis · 19% Compilers and program optimization · 19% |
Topics — the 8 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Embedded and real-time systems
real-time communication |
0.2 | 1 | 2014 | Evaluation of Communication Architectures for Switched Real-Time Ethernet · IEEE Trans. Computers 2014 |
Embedded and real-time systems › real-time communication
time-triggered communication |
0.2 | 1 | 2014 | Evaluation of Communication Architectures for Switched Real-Time Ethernet · IEEE Trans. Computers 2014 |
Program verification › dynamic verification
runtime verification |
0.2 | 1 | 2013 | RiTHM: a tool for enabling time-triggered runtime verification for C programs · ESEC/SIGSOFT FSE 2013 |
Embedded and real-time systems › runtime monitoring
runtime verification |
0.2 | 1 | 2013 | RiTHM: a tool for enabling time-triggered runtime verification for C programs · ESEC/SIGSOFT FSE 2013 |
Reconfigurable computing and FPGAs
FPGA prototyping |
0.1 | 1 | 2014 | Evaluation of Communication Architectures for Switched Real-Time Ethernet · IEEE Trans. Computers 2014 |
Compilers and program optimization › program instrumentation
instrumentation optimization |
0.0 | 1 | 2013 | RiTHM: a tool for enabling time-triggered runtime verification for C programs · ESEC/SIGSOFT FSE 2013 |
Program analysis
static analysis |
0.0 | 1 | 2013 | RiTHM: a tool for enabling time-triggered runtime verification for C programs · ESEC/SIGSOFT FSE 2013 |
GPUs and heterogeneous computing
GPU computing |
0.0 | 1 | 2013 | RiTHM: a tool for enabling time-triggered runtime verification for C programs · ESEC/SIGSOFT FSE 2013 |
Methods — techniques the papers use, named apart from their topics
static analysis · 0.3control theory · 0.3LTL · 0.3network code · 0.2experimental characterization · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2014 | Evaluation of Communication Architectures for Switched Real-Time EthernetabstractSafety-critical distributed real-time applications operating with strict temporal constraints rely on deterministic networks with low latency and jitter. Traditional fieldbus systems deliver these guarantees, but they have limited compatibility with open infrastructures and limited support for high transmission rates. Ethernet technology rises as a low-cost, high-speed, and ubiquitous alternative to fieldbus systems; however, standard Ethernet requires special arbitration mechanisms to support real-time traffic because of the standard's inherent nondeterministic behavior. This work explores the associated tradeoffs for three different solutions for real-time communication over switched Ethernet. The paper presents and discusses three architectures that modify different network components, enhancing them with additional customized modules to support time-triggered communication based on Network Code. Using the NetFPGA platform as the unified prototyping technology for all the components, we developed an open-source framework to characterize each solution using experimental data for the latency, jitter, throughput, robustness, and cost in logical resources. The results provide insights to help future developers of real-time communication technology decide which components to modify according to the requirements of their applications. Gonzalo Carvajal, Chun Wah Wallace Wu, Sebastian Fischmeister |
IEEE Trans. Computers | 2 |
| 2013 | Reducing Monitoring Overhead by Integrating Event- and Time-Triggered Techniques
Chun Wah Wallace Wu, Borzoo Bonakdarpour, Sebastian Fischmeister |
RV | 1 |
| 2013 | RiTHM: a tool for enabling time-triggered runtime verification for C programsabstractWe introduce the tool RiTHM (Runtime Time-triggered Heterogeneous Monitoring). RiTHM takes a C program under inspection and a set of LTL properties as input and generates an instrumented C program that is verified at run time by a time-triggered monitor. RiTHM provides two techniques based on static analysis and control theory to minimize instrumentation of the input C program and monitoring intervention. The monitor's verification decision procedure is sound and complete and exploits the GPU many-core technology to speedup and encapsulate monitoring tasks. Samaneh Navabpour, Yogi Joshi, Chun Wah Wallace Wu, Shay Berkovich, Ramy Medhat, Borzoo Bonakdarpour, Sebastian Fischmeister |
ESEC/SIGSOFT FSE | 3 |
| 2011 | Efficient Techniques for Near-Optimal Instrumentation in Time-Triggered Runtime Verification
Samaneh Navabpour, Chun Wah Wallace Wu, Borzoo Bonakdarpour, Sebastian Fischmeister |
RV | 2 |