VLDB 2026 Research / reviewers in the wild / expert
Merlin G. Smith
dblp:75/2294
· DBLP profile ↗
3ranked-venue papers
1as first author
0since 2021 · last 1981
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 94% Integrated circuit design · 6% |
Topics — the 4 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
hardware verification and test |
0.0 | 1 | 1981 | The Weighted Syndrome Sums Approach to VLSI Testing · IEEE Trans. Computers 1981 |
Electronic design automation › hardware verification and test › combinational circuit testing
syndrome testing |
0.0 | 1 | 1981 | The Weighted Syndrome Sums Approach to VLSI Testing · IEEE Trans. Computers 1981 |
Electronic design automation › hardware verification and test
VLSI testing |
0.0 | 1 | 1981 | The Weighted Syndrome Sums Approach to VLSI Testing · IEEE Trans. Computers 1981 |
Integrated circuit design
large-scale integration |
0.0 | 1 | 1969 | The Questions of Systems Implementation with Large-Scale Integration · IEEE Trans. Computers 1969 |
Methods — techniques the papers use, named apart from their topics
design partitioning · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1981 | VLSI Self-Testing Based on Syndrome Techniques
Zeev Barzilai, Jacob Savir, George Markowsky, Merlin G. Smith |
ITC | 4 |
| 1981 | The Weighted Syndrome Sums Approach to VLSI TestingabstractWith the advent of VLSI, testing has become one of the most costly, complicated, and time consuming problems. The method of syndrome- testing is applicable toward VLSI testing since it does not require test generation and fault simulation. It can also be considered as a vehicle for self-testing. In order to employ syndrome-testing in VLSI, we electronically partition the chip into macros in test mode. The macros are then syndrome tested in sequence. Zeev Barzilai, Jacob Savir, George Markowsky, Merlin G. Smith |
IEEE Trans. Computers | 4 |
| 1969 | The Questions of Systems Implementation with Large-Scale IntegrationabstractLarge-scale integration (LSI) is four to five years old for many of us, yet we must continue to ask some very fundamental questions. Can we reach the substantial hardware cost reductions projected? How much will this impact system cost? Where is the market and how will it evolve? Will implementation problems force radical system designs? Does the key rest with automation, e.g., with simulation and testing, or rather will it depend upon our ability to design with repetitive structures? And not the least of our considerations, would a low-cost LSI provide the economic base for the solution to the many highly complex problems? This paper will attempt to focus attention upon some of the saJient issues involved in the fore-going questions. Merlin G. Smith, William A. Notz, Erwin Schischa |
IEEE Trans. Computers | 1 |