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Robert Anholt

dblp:75/6000 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1989
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 70% Electronic design automation · 30%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
analog and mixed-signal circuits
0.011989
A process and device model for GaAs MESFET technology: GATES · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989
Integrated circuit design › analog and mixed-signal circuits
device modeling
0.011989
A process and device model for GaAs MESFET technology: GATES · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989
Electronic design automation › technology computer-aided design
process modeling
0.011989
A process and device model for GaAs MESFET technology: GATES · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989
Integrated circuit design › radio-frequency circuit design
microwave integrated circuits
0.011989
A process and device model for GaAs MESFET technology: GATES · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989

Methods — techniques the papers use, named apart from their topics

ion implantation modeling · 0.0i-v curve fitting · 0.0analytical device modeling · 0.0
YearPublicationVenuePosition
1989 A process and device model for GaAs MESFET technology: GATES
abstract
A combined process and device modeling program for GaAs MESFET digital and microwave integrated-circuit technology is described. GATES (for GaAs transistor engineering models) is designed to meet the needs of process, test, and manufacturing engineers who require answers to questions about how process parameters and tolerances affect device performance and uniformity, but who have limited access to large-computer modeling tools. The program makes extensive use of analytical models. The physical models used for ion implantation, dopant diffusion and other process factors and the methods used to calculate carrier profiles, threshold voltages, layer resistivities. MESFET parasitic resistances, and I-V characteristics are discussed. The I-V curves can be fitted to expressions suitable for use in circuit optimization codes such as SPICE. It is shown how to calibrate some of the physical quantities.>
Robert Anholt, Thomas W. Sigmon
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1