A ring-based inductive peaking VCO with a novel noise reduction technique is reported in this paper. An extra cascode transistor is used to bias the switching transistor into the deep triode region where the noise performance is better than that in the saturation region. A differential structure with a full custom symmetrical inductor demonstrates the benefits of the concept. The highest operational frequency reached was 39GHz with a tuning range of more than 4 octaves. The figure of merit (≈189) indicates that better overall combination of frequency and phase noise is obtained when compared with previous work.

In this paper, we present a brief history of silicon photonics from the early research papers in the late 1980s and early 1990s, to the potentially revolutionary technology that exists today. Given that other papers in this special issue give detailed reviews of key aspects of the technology, this paper will concentrate on the key technological milestones that were crucial in demonstrating the capability of silicon photonics as both a successful technical platform, as well as indicating the potential for commercial success. The paper encompasses discussion of the key technology areas of passive devices, modulators, detectors, light sources, and system integration. In so doing, the paper will also serve as an introduction to the other papers within this special issue.

This paper describes a fully differential inductor-less temperature independent laser driver for a Mach-Zehnder modulator (MZM). With push pull structure in output stage and adaptive feedback topology in pre-driver stages, the laser driver purposed (fabricated using a 130nm CMOS process) in this work can achieve differential output voltage swing of up to 4Vpp when driving a 50 Ohm load at speeds of up to 12.5Gb/s across a temperature range 27°C to 135°C.

High speed, large voltage swing, low power and robust driver circuit is required for the recent silicon photonics based optical link. Unlike the popular CML approach; this work applies the replica biasing function to cascoded push pull driver. We demonstrate that the proposed approach significantly increases the speed of driver, moderately decreases the power consumption, and strengthen the robustness of driver. Two different design examples are fabricated using IBM-8RF 1P8M 0.13μm CMOS process. At typical process corner, post layout simulation results show that when driving 50 Ohm load at the speed of 10 GB/s, the proposed driver can provide 16dB gain with its output voltage swing at 4.0 Vpp (differential) and the power consumption less than 262mW.