VLDB 2026 Research / reviewers in the wild / expert
Hiroki Morizumi
dblp:75/6758
· DBLP profile ↗
14ranked-venue papers
9as first author
1since 2021 · last 2021
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Theory of computation · 14 · 9 first-author · 1 since 2021Databases, data management, data science and information retrieval · 1 · 1 first-author
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2021 | On the Power of Nondeterministic Circuits and Co-Nondeterministic Circuits
Hiroki Morizumi |
LATA | 1 |
| 2018 | Zero-Suppression and Computation Models
Hiroki Morizumi |
IWOCA | 1 |
| 2015 | Lower Bounds for the Size of Nondeterministic Circuits
Hiroki Morizumi |
COCOON | 1 |
| 2011 | Improved approximation algorithms for minimum AND-circuits problem via k-set cover
Hiroki Morizumi |
Inf. Process. Lett. | 1 |
| 2009 | Limiting Negations in Formulas
Hiroki Morizumi |
ICALP (1) | 1 |
| 2009 | Negation-Limited Complexity of Parity and Inverters
Kazuo Iwama, Hiroki Morizumi, Jun Tarui |
Algorithmica | 2 |
| 2009 | Limiting negations in non-deterministic circuits
Hiroki Morizumi |
Theor. Comput. Sci. | 1 |
| 2009 | Linear-size log-depth negation-limited inverter for k-tonic binary sequences
Hiroki Morizumi, Jun Tarui |
Theor. Comput. Sci. | 1 |
| 2008 | Negation-Limited Inverters of Linear Size
Hiroki Morizumi, Genki Suzuki |
ISAAC | 1 |
| 2008 | Reductions for monotone Boolean circuits
Kazuo Iwama, Hiroki Morizumi, Jun Tarui |
Theor. Comput. Sci. | 2 |
| 2007 | Linear-Size Log-Depth Negation-Limited Inverter for k -Tonic Binary Sequences
Hiroki Morizumi, Jun Tarui |
TAMC | 1 |
| 2006 | Negation-Limited Complexity of Parity and Inverters
Kazuo Iwama, Hiroki Morizumi, Jun Tarui |
ISAAC | 2 |
| 2006 | Reductions for Monotone Boolean Circuits
Kazuo Iwama, Hiroki Morizumi |
MFCS | 2 |
| 2002 | An Explicit Lower Bound of 5n - o(n) for Boolean Circuits
Kazuo Iwama, Hiroki Morizumi |
MFCS | 2 |