This article introduces a novel power amplifier integrated active antenna (PAIAA) with increased efficiency that integrates a Class-$F {^{-}1 }$Gallium Nitride (GaN) power amplifier (PA) and a stub-loaded wide slot antenna (SLSA) for wireless power transmission (WPT) applications. Unlike conventional PA integrated active antennas in which antennas and PAs are separately matched to 50 ohms, the input impedance of the SLSA is meticulously engineered to match the fundamental impedance and modulate harmonic impedances of the GaN transistor by optimizing the dimensions of the SLSA's stubs. This approach eliminates the output matching network (OMN), the PA's harmonic modulation network (HMN), and the antenna's input matching network (IMN), which typically incur unavoidable insertion loss but are essential for conventional Class-$F {^{-}1 }$PAs and antennas. Consequently, it enhances the power-added efficiency (PAE) within the 3.3–3.8-GHz range and reduces the overall size of the PA integrated active antenna. Thanks to the extended design freedom offered by SLSA, precise impedance values can be achieved across a broader frequency range, resulting in increased efficiency across a larger spectrum. In addition, an innovative insertion loss measurement method for impedance matching network with a non-50-$\Omega $port is introduced to accurately measure the Class-$F {^{-}1 }$PA's PAE incorporated in the proposed PAIAA. The measured PAIAA demonstrates a peak PAE of 70.1%, surpassing the performances of reported integrated active antennas. The measured effective isotropic radiated power (EIRP) of the proposed PAIAA is 44.52 dBm. A conventional PA-antenna design, where an antenna and a Class-$F {^{-}1 }$PA are separately matched to$50~\Omega $and simply cascaded, is also designed and measured as a contrast, whose measured peak PAE and EIRP of the conventional design are only 61.5% and 43.9 dBm, respectively. The proposed PAIAA, with its increased efficiency, can be practically utilized for WPT applications in the Internet of Things (IoT), where efficiency performance is critical.

In recent years, fully-connected hybrid beamforming (FC-HBF) architecture has aroused widespread interest for millimeter wave (mmWave) massive multi-input multi-output (MIMO) communication systems. However, the FC-HBF structure suffers from significant linearity deterioration, limiting its applications in actual mmWave transmitters. To resolve this issue, an effective digital predistortion (DPD) method utilizing analytical multi-input behavioral models is proposed in this paper for linearizing the FC-HBF system. Based on the nonlinearity analysis and behavioral modeling of the array response, three analytical multi-input models are derived by embedding the priori beamforming information in the predistorter. The complexity of the proposed analytical models is significantly reduced compared to the state-of-the-art. Numerical simulations and experimental measurement are carried out on a$4\times 64$mmWave FC-HBF array and$2\times 16$quasi-test platform respectively to validate the performance of the proposed DPDs against the state-of-the-art DPDs, which show significant linearization abilities to compensate for the nonlinear distortions of beam signals. The proof-of-the-concept validations in this paper indicate that the proposed scheme is fully capable of linearizing an mmWave FC-HBF array.

This paper presents the analysis and design of broadband balance-compensated transformer baluns, suitable for silicon-based millimeter-wave (mm-wave) circuits requiring broadband high-quality balanced-unbalanced conversion. By introducing a mode-dependent lumped-element transformer model, a general center-tap-based balance-compensation method is proposed for transformer baluns, with two practical broadband compensation techniques derived. Several critical issues regarding the practical design of broadband balance-compensated transformer baluns are also discussed, including the parasitic effects in balance compensation, the consideration of windings’ turn number, and the balun design for impedance matching. As a proof-of-concept, three broadband balance-compensated transformer baluns, operating at different frequencies, are employed in a D-band frequency sextupler in [mode = text, reset-text-series = false]22 nm FD-SOI CMOS. The fabricated sextupler demonstrates a 5.1-dBm peak output power and [mode = text, reset-text-series = false]8.49% peak DC-RF efficiency at [mode = text, reset-text-series = false]145.5 GHz, and presents a 3-dB peak output power bandwidth ranging from qtyrange [mode = text,reset-text-series = false, range-units = single]127162 GHz with more than 37-dBc harmonic rejection ratio (HRR).

In this paper, a low complexity moving average nested generalized memory polynomial model (MAN-GMP) is proposed for digital predistortion (DPD) of broadband power amplifiers (PAs). As the signal bandwidth increases drastically, the strong nonlinear distortions, especially those induced by the memory effect, are generated from the highly efficient PAs. To compensate for the strong memory effect, a moving average nested envelope memory polynomial (MAN-EMP) model is derived from an accuracy-enhanced GMP model, which offers reduced complexity while suffering from degraded modeling accuracy. The MAN-GMP model is further proposed to improve the modeling accuracy by connecting several memory branches of the MAN-EMP model in parallel. An iterative algorithm is designed to extract the model coefficients efficiently through only one or two iterations. Experimental measurements are carried out on two sub-7 GHz broadband GaN Doherty PAs with up to 200 MHz bandwidth OFDM signals to benchmark the proposed MAN-GMP model against the GMP, the parallel-LUT-MP-EMP (PLUME), the augmented complexity-reduced GMP (ACR-GMP), the generalized twin-nonlinear two-box (GTNTB), and the enhanced Wiener models. The experimental results show that the MAN-GMP model can effectively compensate for the nonlinear distortion of broadband PAs with significant complexity reduction.

In this paper, a novel multi-stream spatial digital predistortion (DPD) technique is proposed to model and linearize the fully-connected (FC) hybrid beamforming (HBF) transmitters. The proposed scheme solves the DPD implementation issue in the FC HBF array by estimating and linearizing the beam signals instead of the individual PAs. In FC HBF systems, significant intermodulation (IMD) between different transmit signals will be generated due to the analog beamforming and combining network upstream of the power amplifiers (PAs). The IMD beams will end up being radiated in different directions and some of them might fall in the linear beam directions. Therefore, multi-input DPD blocks using a practical multi-variable model are constructed for each RF chain to eliminate the complicated inner- and cross-channel IMDs of the beam signals. Simulations on a 4-stream 64-element FC HBF array and experimental tests on a 2-stream 4-element system are carried out to benchmark the proposed DPD technique against the conventional techniques. Better than 13 dB adjacent channel power ratio (ACPR) improvement and 12 dB normalized mean square error (NMSE) improvement have been achieved by the proposed DPD technique.

Highly efficient power amplifiers (PAs) and associated linearization techniques have been developed to accommodate the explosive growth in the data transmission rate and application of massive multiple input multiple output (mMIMO) systems. In this paper, energy-efficient integrated Doherty PA monolithic microwave integrated circuits (MMICs) and linearization techniques are reviewed for both the sub-6 GHz and millimeter-wave (mm-Wave) fifth-generation (5G) mMIMO systems; different semiconductor processes and architectures are compared and analyzed. Since the 5G protocols have not yet been finalized and PA specifications for mMIMO are still under consideration, it is worth investigating novel design methods to further improve their efficiency and linearity performance. Digital predistortion techniques need to evolve to be adapted in mMIMO systems, and some creative linearity enhancement techniques are needed to simultaneously improve the compensation accuracy and reduce the power consumption.