Martin L. Schmatz

dblp:76/2887 · DBLP profile ↗
← Back
6ranked-venue papers
1as first author
2since 2021 · last 2024
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2Applied, interdisciplinary, general and emerging computing · 2 · 2 since 2021Computer networks · 1Software engineering, systems software and programming languages · 1Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
2 papers
Network measurement and analytics · 54% Physical-layer communications · 46%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Cloud and datacenter computing · 95% Integrated circuit design · 5%

Topics — the 6 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Network measurement and analytics
traffic measurement
0.212015
When Virtual Meets Physical at the Edge: A Field Study on Datacenters' Virtual Traffic · SIGMETRICS 2015
Cloud and datacenter computing
virtualization
0.112015
When Virtual Meets Physical at the Edge: A Field Study on Datacenters' Virtual Traffic · SIGMETRICS 2015
Cloud and datacenter computing › virtualization
virtual machine migration
0.112015
When Virtual Meets Physical at the Edge: A Field Study on Datacenters' Virtual Traffic · SIGMETRICS 2015
Physical-layer communications › equalization
adaptive equalization
0.112006
Low-Complexity Adaptive Equalization for High-Speed Chip-to-Chip Communication Paths by Zero-Forcing of Jitter Components · IEEE Trans. Commun. 2006
Physical-layer communications
equalization
0.112006
Low-Complexity Adaptive Equalization for High-Speed Chip-to-Chip Communication Paths by Zero-Forcing of Jitter Components · IEEE Trans. Commun. 2006
Integrated circuit design
low-power circuit design
0.012006
Low-Complexity Adaptive Equalization for High-Speed Chip-to-Chip Communication Paths by Zero-Forcing of Jitter Components · IEEE Trans. Commun. 2006

Methods — techniques the papers use, named apart from their topics

traffic multiplexing analysis · 0.4field measurement study · 0.4zero-forcing · 0.1jitter minimization · 0.1
YearPublicationVenuePosition
2024 Designing (Not Only) Lunar Space Data Centers
abstract
An unprecedented amount of data generated in space missions triggers lots of practical challenges and concerns with its transfer, storage, and analysis. As Lunar and deep space missions emerge, we need to also face the challenges of distributed computing and big data analytics. In this paper, we outline these issues and discuss how to design and analyze Lunar data centers, being space data centers designed for distributed computing, and data analysis for (not only) Lunar missions. We investigate the opportunities and chances of such space architectures to lay the foundations for practical space data centers and real-life use cases.
Agata M. Wijata, Alicja Musial, Dawid Lazaj, Michal Gumiela, Mateusz Przeliorz, Patricia Sagmeister, Thomas Morf, Martin L. Schmatz, Nicolas Longépé, Pierre-Philippe Mathieu, Jakub Nalepa
IGARSS9
2023 Benchmarking Space-Based Data Center Architectures
abstract
The rapid growth of the space industry is creating an increasing amount of data in orbit, which at the current time is not matched yet by a corresponding increase in data download capacity. Using data analytics at the edge, i.e., data processing on-board satellites, holds the promise to significantly mitigate this problem. Newly available and highly efficient artificial intelligence (AI) hardware accelerators and other off-the-shelf compute-hardware has already been successfully exploited for demonstrating satellite on-board deep learning. Aggregating such components and technologies at scale and introducing resource sharing concepts beyond individual spacecrafts, will yield the equivalent of a space data center—a space-based system that will collect, process, store, and relay data from own sensors or from "client" satellites and work in orchestration with other SDCs in a network. In this paper, we outline new opportunities for such data- and compute-sharing schemes in space and how current limitations of existing systems can be overcome.
Michal Gumiela, Alicja Musial, Agata M. Wijata, Dawid Lazaj, Patricia Sagmeister, Thomas Morf, Martin L. Schmatz, Jakub Nalepa
IGARSS8
2015 RStore: A Direct-Access DRAM-based Data Store
abstract
Distributed DRAM stores have become an attractive option for providing fast data accesses to analytics applications. To accelerate the performance of these stores, researchers have proposed using RDMA technology. RDMA offers high bandwidth and low latency data access by carefully separating resource setup from IO operations, and making IO operations fast by using rich network semantics and offloading. Despite recent interest, leveraging the full potential of RDMA in a distributed environment remains a challenging task. In this paper, we present RDMA Store or RStore, a DRAM-based data store that delivers high performance by extending RDMA's separation philosophy to a distributed setting. RStore achieves high aggregate bandwidth (705 Gb/s) and close-to-hardware latency on our 12-machine testbed. We developed a distributed graph processing framework and a Key-Value sorter using RStore's unique memory-like API. The graph processing framework, which relies on RStore for low-latency graph access, outperforms state-of-the-art systems by margins of 2.6 -- 4.2× when calculating Page Rank. The Key-Value sorter can sort 256 GB of data in 31.7 sec, which is 8× better than Hadoop TeraSort in a similar setting.
Animesh Trivedi, Patrick Stuedi, Bernard Metzler, Clemens Lutz, Martin L. Schmatz, Thomas R. Gross
ICDCS5
2015 When Virtual Meets Physical at the Edge: A Field Study on Datacenters' Virtual Traffic
abstract
The wide deployment of virtualization in datacenters catalyzes the emergence of virtual traffic that delivers the network demands between the physical network and the virtual machines hosting clients' services. Virtual traffic presents new opportunities for reducing physical network demands, as well as challenges of increasing management complexity. Given the plethora of prior art on virtualization technologies in datacenters, surprisingly little is still known about such virtual traffic, and its dependence on the physical network and virtual machines. This paper provides a multi-faceted analysis of the patterns and impacts of multiplexing the virtual traffic onto the physical network, particularly from the perspective of the network edge. We use a large collection of field data from production datacenters hosting a large number of diversified services from multiple enterprise tenants. Our first focus is on uncovering the temporal and spatial characteristics of the virtual and physical traffic, i.e., network demand growth and communication patterns, with special attention paid to the traffic of migrating virtual machines. The second focus is on characterizing the effect of network multiplexing in terms of communication locality, traffic load heterogeneity, and the dependency on CPU processing power at the edges of the network. Last but not least, we conduct a mirroring analysis on service QoS, defined by the service unavailability induced by network related issues, e.g., loads. We qualitatively and quantitatively discuss the implications and opportunities that virtual traffic presents for network capacity planning of virtualized networks and datacenters.
Robert Birke, Mathias Björkqvist, Cyriel Minkenberg, Martin L. Schmatz, Lydia Y. Chen
SIGMETRICS4
2014 Scalable, efficient ASICS for the square kilometre array: From A/D conversion to central correlation
abstract
The Square Kilometre Array (SKA) is a future radio telescope, currently being designed by the worldwide radio-astronomy community. During the first of two construction phases, more than 250,000 antennas will be deployed, clustered in aperture-array stations. The antennas will generate 2.5 Pb/s of data, which needs to be processed in real time. For the processing stages from A/D conversion to central correlation, we propose an ASIC solution using only three chip architectures. The architecture is scalable - additional chips support additional antennas or beams - and versatile - it can relocate its receiver band within a range of a few MHz up to 4GHz. This flexibility makes it applicable to both SKA phases 1 and 2. The proposed chips implement an antenna and station processor for 289 antennas with a power consumption on the order of 600W and a correlator, including corner turn, for 911 stations on the order of 90 kW.
Martin L. Schmatz, Rik Jongerius, Gero Dittmann, Andreea Anghel, Antonius P. J. Engbersen, Jan van Lunteren, Peter Buchmann
ICASSP1
2006 Low-Complexity Adaptive Equalization for High-Speed Chip-to-Chip Communication Paths by Zero-Forcing of Jitter Components
abstract
In this letter, we show how a prefilter can be automatically adapted to open the data eye in a nonreturn to zero transmission system using only two binary samples per bit. Although the equalizer primarily aims to minimize timing jitter with a zero-forcing criterion, this equalization method also results in nearly optimum vertical eye opening, thereby causing very little overhead in complexity and power consumption. The target application is low-power high-speed serial links to transfer data between chips over a printed circuit board
Thomas Toifl, Martin L. Schmatz, Christian Menolfi
IEEE Trans. Commun.2