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Pen-Yuang Chang

dblp:76/4469 · DBLP profile ↗
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6ranked-venue papers
2as first author
0since 2021 · last 1998
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
5 papers
Parallel and multicore computing · 34% Processor architecture and microarchitecture · 19% Electronic design automation · 18%
Theoretical computer science
1 paper
Algorithms and data structures · 50% Graph algorithms and graph theory · 50%

Topics — the 13 heaviest of 14, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture › parallel computer organization
systolic array design
0.031995
Some New Designs of 2-D Array for Matrix Multiplication and Transitive Closure · IEEE Trans. Parallel Distributed Syst. 1995
Design of Efficient Regular Arrays for Matrix Multiplication by Two-Step Regularization · IEEE Trans. Parallel Distributed Syst. 1995
Design of Space-Optimal Regular Arrays for Algorithms with Linear Schedules · IEEE Trans. Computers 1995
Hardware accelerators and domain-specific architectures
systolic array
0.021998
An Approach to Designing Modular Extensible Linear Arrays for Regular Algorithms · IEEE Trans. Computers 1998
A Family of Efficient Regular Arrays for Algebraic Path Problem · IEEE Trans. Computers 1994
High-performance computing › numerical linear algebra
matrix multiplication
0.021995
Some New Designs of 2-D Array for Matrix Multiplication and Transitive Closure · IEEE Trans. Parallel Distributed Syst. 1995
Design of Efficient Regular Arrays for Matrix Multiplication by Two-Step Regularization · IEEE Trans. Parallel Distributed Syst. 1995
Parallel and multicore computing
array processor
0.011998
An Approach to Designing Modular Extensible Linear Arrays for Regular Algorithms · IEEE Trans. Computers 1998
Electronic design automation
high-level synthesis
0.011998
An Approach to Designing Modular Extensible Linear Arrays for Regular Algorithms · IEEE Trans. Computers 1998
Parallel and multicore computing › array processor
linear array
0.011998
An Approach to Designing Modular Extensible Linear Arrays for Regular Algorithms · IEEE Trans. Computers 1998
Electronic design automation › system-level design › model of computation
regular iterative algorithm
0.021995
Some New Designs of 2-D Array for Matrix Multiplication and Transitive Closure · IEEE Trans. Parallel Distributed Syst. 1995
Design of Efficient Regular Arrays for Matrix Multiplication by Two-Step Regularization · IEEE Trans. Parallel Distributed Syst. 1995
Parallel and multicore computing › parallel graph algorithms
transitive closure
0.011995
Some New Designs of 2-D Array for Matrix Multiplication and Transitive Closure · IEEE Trans. Parallel Distributed Syst. 1995
Algorithms and data structures › symbolic computation › computational algebra › algebraic algorithms
algebraic path problem
0.011994
A Family of Efficient Regular Arrays for Algebraic Path Problem · IEEE Trans. Computers 1994
Graph algorithms and graph theory › graph algorithms
transitive closure
0.011994
A Family of Efficient Regular Arrays for Algebraic Path Problem · IEEE Trans. Computers 1994
Parallel and multicore computing › parallel scheduling
linear schedules
0.011995
Design of Space-Optimal Regular Arrays for Algorithms with Linear Schedules · IEEE Trans. Computers 1995
Parallel and multicore computing › parallel algorithms
parallel algorithm design
0.011995
Design of Space-Optimal Regular Arrays for Algorithms with Linear Schedules · IEEE Trans. Computers 1995
Parallel and multicore computing
processor allocation
0.011995
Design of Space-Optimal Regular Arrays for Algorithms with Linear Schedules · IEEE Trans. Computers 1995

Methods — techniques the papers use, named apart from their topics

m-phase schedule · 0.0dependence graph decomposition · 0.0dependence graph analysis · 0.0two-step regularization · 0.0space-time mapping · 0.0regular iterative algorithm · 0.0permutation sequence selection · 0.0nonlinear processor allocation · 0.0gcd-partition · 0.0broadcast plane selection · 0.0
YearPublicationVenuePosition
1998 An Approach to Designing Modular Extensible Linear Arrays for Regular Algorithms
abstract
The purpose of this paper is to describe a new method to design unidirectional modular extensible linear arrays for regular algorithms. The time complexity of our method is polynomial and depends only on the number of dimensions of the regular algorithm. The designed linear array is asymptotically optimal in space and time.
Pen-Yuang Chang, Jong-Chuang Tsay
IEEE Trans. Computers1
1996 Designing Lower-Dimensional Regular Arrays for Algorithms with Uniform Dependencies
Jong-Chuang Tsay, Pen-Yuang Chang
J. Parallel Distributed Comput.2
1995 Design of Space-Optimal Regular Arrays for Algorithms with Linear Schedules
abstract
The problem of designing space-optimal 2D regular arrays for N/spl times/N/spl times/N cubical mesh algorithms with linear schedule ai+bj+ck, 1/spl les/a/spl les/b/spl les/c, and N=nc, is studied. Three novel nonlinear processor allocation methods, each of which works by combining a partitioning technique (gcd-partition) with different nonlinear processor allocation procedures (traces), are proposed to handle different cases. In cases where a+b/spl les/c, which are dealt with by the first processor allocation method, space-optimal designs can always he obtained in which the number of processing elements is equal to N/sup 2c. For other cases where a+b>c and either a=b and b=c, two other optimal processor allocation methods are proposed. Besides, the closed form expressions for the optimal number of processing elements are derived for these cases.>
Jong-Chuang Tsay, Pen-Yuang Chang
IEEE Trans. Computers2
1995 Design of Efficient Regular Arrays for Matrix Multiplication by Two-Step Regularization
abstract
A two-step regularization method in which first permutation sequences and then broadcast planes are selected is proposed to design various regular iterative algorithms for matrix multiplication. The regular iterative algorithms are then spacetime mapped to regular arrays, such as mesh, cylindrical, two-layered mesh, and orbital arrays. The proposed method can be used to design regular arrays with execution time of less than N (problem size).>
Jong-Chuang Tsay, Pen-Yuang Chang
IEEE Trans. Parallel Distributed Syst.2
1995 Some New Designs of 2-D Array for Matrix Multiplication and Transitive Closure
abstract
We present some new regular iterative algorithms for matrix multiplication and transitive closure. With these algorithms, by spacetime mapping the 2-D arrays with 2N-1 and upper bound [(3N-1)/2] execution times for matrix multiplication can be obtained. Meanwhile, we can derive a 2-D array with 4N-2 execution rime for transitive closure based on the sequential Warshall-Floyd algorithm. All these new 2-D arrays for matrix multiplication and transitive closure have the advantages of faster and more regular than other previous designs.>
Jong-Chuang Tsay, Pen-Yuang Chang
IEEE Trans. Parallel Distributed Syst.2
1994 A Family of Efficient Regular Arrays for Algebraic Path Problem
abstract
The method of decomposing a dependence graph into multiple phases with an appropriate m-phase schedule function is useful for designing faster regular arrays for matrix multiplication and transitive closure. In this paper, we further apply this method to design several parallel algorithms for the algebraic path problem and derive N/spl times/N 2D regular arrays with execution times [9N/2]-2 (for the cylindrical array and the orthogonal one) and 4N-2 (for the spherical one).>
Pen-Yuang Chang, Jong-Chuang Tsay
IEEE Trans. Computers1