Pixel value ordering (PVO) is an efficient method for implementing reversible data hiding, which can achieve embedding based on overlapping pixel blocks when combined with the flexible patch moving (FPM) mode, especially the two-dimensional (2D) FPM mode. However, the existing 2D FPM mode, whose pairing way of prediction error is not conducive to generating more pixel blocks available for embedding, and whose movement rules are too inefficient to fully exploit the potential of the PVO, results in wasting many available blocks. Therefore, in this paper, a two-stage embedding mechanism is proposed for the 2D FPM mode, in which the combination of prediction errors is adjusted to improve the possibility of generating available blocks and the two-stage embedding doubles the number of pixel blocks available for embedding. Furthermore, an FPM mode selection is proposed, where four novel 2D FPM modes are designed to efficiently exploit the potential of the PVO according to the different directional gradients. Lastly, a set of efficient 2D mappings is well-designed for multiple histograms to achieve lower embedding distortion. The extensive experimental results show that the proposed method outperforms other state-of-the-art methods in terms of embedding capacity and image fidelity. The average peak signal-to-noise ratio for the Kodak image dataset is as high as 63.62 dB after embedding 10,000 bits.

In recent years, reversible data hiding in encrypted domain (RDH-ED) has garnered considerable interest among researchers, resulting in the development of high-performance methods based on various carriers. However, the challenge of enhancing the data embedding capacity while ensuring reversibility becomes increasingly pronounced when the carrier is a three-dimensional (3D) model. In this paper, a high capacity RDH-ED method based on dynamic prediction and virtual connection for 3D models is proposed. Unlike existing methods that partition the vertices in the model into embeddable and prediction sets, where each vertex can only serve one function, the proposed dynamic prediction mechanism constructs a data embedding order set by leveraging the connectivity relationships between vertices. This allows each vertex within the set to both embed data and provide predictions, significantly increasing the proportion of embeddable vertices. Moreover, the proposed method is the first work to consider independent vertices within the model and integrates a novel virtual connection approach with the dynamic prediction process, enabling all independent vertices to participate in data embedding and prediction, thereby further enhancing the data embedding capacity. Experimental results demonstrated that the proposed method significantly outperforms other state-of-the-art methods in terms of data embedding capacity while ensuring reversibility.

Abstract Counter-cryptanalysis uses cryptanalytic techniques to detect cryptanalytic attacks. It was introduced by Stevens with a collision detection algorithm that detects whether a message is one of a colliding message pair constructed using a collision attack. Later, Stevens and Shumow improved the collision detection against SHA-1 by using unavoidable conditions. However, there are no results improving collision detection against MD5 due to its weak diffusion properties. In this paper, an improved collision detection algorithm against MD5 is proposed by using the 14-bit sufficient condition combinations. This leads to the dividing the 223 classes into four sets. Each element, belonging to the first two sets, holds the same sufficient condition combination. Our new algorithm can classify 126 classes efficiently. The runtime is 28.6% of the previous collision detection method.

GOST, known as GOST-28147-89, was standardized as the Russian encryption standard in 1989. It is a lightweight-friendly cipher and suitable for the resource-constrained environments. However, due to the simplicity of GOST’s key schedule, it encountered reflection attack and fixed point attack. In order to resist such attacks, the designers of GOST proposed a modification of GOST, namely, 2-GOST. This new version changes the order of subkeys in the key schedule and uses concrete S-boxes in round function. But regarding single-key attacks on full-round 2-GOST, Ashur et al. proposed a reflection attack with data of 2 32 on a weak-key class of size 2 224 , as well as the fixed point attack and impossible reflection attack with data of 2 64 for all possible keys. Note that the attacks applicable for all possible keys need the entire plaintext space. In other words, these are codebook attacks. In this paper, we propose single-key attacks on 2-GOST with only about 2 32 data instead of codebook. Firstly, we apply 2-dimensional meet-in-the-middle attack combined with splice-cut technique on full-round 2-GOST. This attack is applicable for all possible keys, and its data complexity reduces from previous 2 64 to 2 32 . Besides that, we apply splice-cut meet-in-the-middle attack on 31-round 2-GOST with only data of 2 32 . In this attack, we only need 8 bytes of memory, which is negligible.

A 100μW, 13bit ADC used for sensor array applications is presented in this paper. The ADC employs an extended counting architecture in which the residual error from a first-order incremental ΣΔ modulator is encoded by a cyclic ADC to achieve high accuracy at a relatively high speed. Hardware reuse technique is utilized for low power consumption and small silicon area. The prototype ADC is implemented in 0.18μm CMOS technology with 1.8V supply voltage and the core area is only 0.06mm2including control logic. The ADC shows a peak SNDR/SFDR of 65.4dB/71.9dB.