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Catherine Bellon

dblp:79/2348 · DBLP profile ↗
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10ranked-venue papers
8as first author
0since 2021 · last 1992
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 9 · 7 first-authorArtificial intelligence and machine learning · 1 · 1 first-authorDatabases, data management, data science and information retrieval · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
5 papers
Electronic design automation · 78% Distributed systems · 8% Interconnection networks and networks-on-chip · 8%

Topics — the 8 heaviest of 10, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
hardware verification and test
0.041984
VLSI test expertise system using a control flow model · DAC 1984
Taking into account asynchronous signals in functional test of complex circuits · DAC 1984
Automatic generation of microprocessor test programs · DAC 1982
Electronic design automation › hardware verification and test
VLSI testing
0.021984
VLSI test expertise system using a control flow model · DAC 1984
Hardware description levels and test for complex circuits · DAC 1981
Electronic design automation › hardware verification and test
asynchronous circuit testing
0.011984
Taking into account asynchronous signals in functional test of complex circuits · DAC 1984
Electronic design automation › hardware verification and test
functional testing
0.011984
Taking into account asynchronous signals in functional test of complex circuits · DAC 1984
Interconnection networks and networks-on-chip › error control
error detection and recovery
0.011982
Protection Against External Errors in a Dedicated System · IEEE Trans. Computers 1982
Distributed systems
fault tolerance
0.011982
Protection Against External Errors in a Dedicated System · IEEE Trans. Computers 1982
Electronic design automation › hardware verification and test › test generation › test case generation
test program generation
0.011982
Automatic generation of microprocessor test programs · DAC 1982
Processor architecture and microarchitecture
microprocessor
0.011982
Automatic generation of microprocessor test programs · DAC 1982

Methods — techniques the papers use, named apart from their topics

control flow model · 0.0input error detection · 0.0
YearPublicationVenuePosition
1992 Fuzzy boom in Japan
abstract
This article is an abridged and translated version of a mission report initially written for the Scientific Service of the French Embassy in Japan. the mission took place in Japan from the 14th to the 21st of October, 1989. an introduction gives the necessary background concerning the applications of fuzzy sets to process control and expert systems; specialized hardwares for these applications are also introduced. Section II offers an account of the visits done during the mission. Section III synthesizes the lesson of the mission. the title makes use of the expression “fuzzy boom” which is often employed in Japan for describing the present blossoming of a great number of practical applications of fuzzy sets and their important repercussion in the media of this country.
Catherine Bellon, Patrick Bosc, Henri Prade
Int. J. Intell. Syst.1
1990 Failure coverage of functional test methods: a comparative experimental evaluation
abstract
An effort has been made to evaluate the fault coverage of functional test methods. A study comparing a structural (manufacturing) test and three functional test methods, a tailored test, a systematic pseudo-exhaustive test, and a random test, is presented. The experiments were performed on defective microprocessors (6800 and 68000). Working with a nonbiased sample of circuits was a major concern; thus, randomly distributed defects were created on a set of good circuits by cutting either Al or poly-Si tracks using microcutter machine equipment. The results concerning defect coverage and Boolean defect coverage are largely better than those given by H.P. Klug (1988). The results indicate that the functional methods evaluated are very thorough. Random test seems to achieve an impressive fault coverage.>
Raoul Velazco, Catherine Bellon, Bernard Martinet
ITC2
1988 Analysis of Experimental Results on Functional Testing and Diagnosis of Complex Circuits
abstract
A number of functional-level test approaches for microprocessors have been proposed. The GAPT approach, presented here, is a pragmatic one, but it is supported by a set of tools and experimental results. The authors describe the GAPT approach in detail. They draw tentative conclusions with respect to the effectiveness and scope of these functional test generation methods.>
Catherine Bellon, Raoul Velazco, Haissam Ziade
ITC1
1984 Taking into account asynchronous signals in functional test of complex circuits
Catherine Bellon, Raoul Velazco
DAC1
1984 VLSI test expertise system using a control flow model
Gabriele Saucier, Catherine Bellon
DAC2
1984 CADOC : A System for Computer Aided Functional Test
Catherine Bellon, Gabriele Saucier
ITC1
1984 Hardware and Software Tools for Microprocessor Functional Test
Catherine Bellon, Raoul Velazco
ITC1
1982 Automatic generation of microprocessor test programs
abstract
This paper presents an automatic generation system for behavioral test programs of microprocessors. First, the test environment is presented, as well as its consequences on test program generation. In the second part, the test principles are outlined; it is a behavioral test, i.e a test determined from the user's description of the microprocessor; the resulting test programs are quite modular. The third part presents the description language and the generation system.
Catherine Bellon, A. Liothin, Sylvain Sadier, Gabriele Saucier, Raoul Velazco, Francois Grillot, M. Issenman
DAC1
1982 Protection Against External Errors in a Dedicated System
abstract
This paper deals with the protection of a dedicated subsystem against an erroneous environment. The inputs of the subsystem can be erroneous and the subsystem must be able to detect erroneous inputs and to recover from them.
Catherine Bellon, Gabriele Saucier
IEEE Trans. Computers1
1981 Hardware description levels and test for complex circuits
Catherine Bellon, Gabriele Saucier, José-Maria Gobbi
DAC1