Virtual Metrology (VM) is a method to conjecture manufacturing quality of a process tool based on data sensed from the process tool and without physical metrology operations. Historical data is used to produce the initial VM models, and then these models are applied to operate in a process drift/shift environment. The accuracy of VM highly depends on the modeling samples adopted during initial-creating and on-line-refreshing periods. Since design-of-experiments (DOE) may not be performed due to large resources required, how could we guarantee stability of the models and predictions when they move into these unknown environments? Conventionally, static-moving-window (SMW) schemes with a fixed window size are adopted during the on-line-refreshing period. The purpose of this paper is to propose a dynamic-moving-window (DMW) scheme for VM model refreshing. The DMW scheme adds a new sample into the model and applies a clustering technology to do similarity clustering. Next, the number of elements in each cluster is checked. If the largest number of elements is greater than the predefined threshold, then the oldest sample in the cluster with the largest population is deleted. Test results show that the DMW scheme has better on-line conjecture accuracy than that of the SMW scheme.

Selection schemes between neural-network (NN) and multiple-regression (MR) outputs of a virtual metrology system (VMS) are studied in this paper. Both NN and MR are applicable algorithms for implementing virtual-metrology (VM) conjecture models. A MR algorithm may achieve better accuracy only with a stable process, whereas a NN algorithm may have superior accuracy when equipment property drift or shift occurs. To take advantage of both MR and NN algorithms, the simple-selection scheme (SS-scheme) is first proposed to enhance the VM conjecture accuracy. This SS-scheme simply selects either NN or MR output according to the smaller Mahalanobis distance between the input process data set and the NN/MR-group historical process data sets. Furthermore, a weighted-selection scheme (WS-scheme), which computes the VM output with a weighted sum of NN and MR results, is also developed. This WS-scheme generates a well-behaved system with continuity between the NN and MR outputs. Both the CVD and photo processes of a fifth-generation TFT-LCD factory are adopted in this paper to test and compare the conjecture accuracy among the solo-NN, solo-MR, SS-scheme, and WS-scheme algorithms. One-hidden-layered back-propagation neural network (BPNN-I) is applied to establish the NN conjecture model. Test results show that the conjecture accuracy of the WS-scheme is the best among those solo-NN, solo-MR, SS-scheme, and WS-scheme algorithms.

Over the past few years, the virtual metrology (VM) technology has been proposed and developed and several VM related papers have been published. These proposed VM architectures are mainly applied for conjecturing single-stage or direct processing quality. However, the processing quality of some of manufacturing processes cannot be measured directly. Those single-stage VM architectures may not be applied to handle this indirect VM problem accurately. To properly handle this indirect VM problem, the paper proposes a dual-stage indirect VM architecture (DIVMA), which involves two process tools, to handle the indirect VM problem. In Stage I, the direct VM model of the fore-tool is established as usual, and then the indirect VM model of the rear-tool is built in Stage II that involves the Stage-I VM output. The concept of virtual cassette is also proposed in the paper. The chemical vapor deposition (CVD) process of a fifth generation TFT-LCD fab in Chi Mei Optoelectronics Corporation (CMO), Taiwan is adopted to test and compare the conjecture accuracy without and with the virtual cassette and the proposed DIVMA. Experimental results demonstrate that the virtual-cassette concept is valid for improving VM conjecturing accuracy; also this DIVMA is adequate for handling the indirect VM problem that has a coupling effect between those two subsequent tools.

This work proposes an advanced key-variable selecting method, the neural-network-based stepwise selection (NN-based SS) method, which can enhance the conjecture accuracy of the NN-based virtual metrology (VM) algorithms. Multi-regression-based (MR-based) SS method is widely applied in dealing with key-variable selecting problems despite that it may not guarantee finding the best model based on its selected variables. However, the variables selected by MR-based SS may be adopted as the initial set of variables for the proposed NN-based SS to reduce the SS process time. The backward elimination and forward selection procedures of the proposed NN-based SS are both performed by the designated NN algorithm used for VM conjecturing. Therefore, the key variables selected by NN-based SS will be more suitable for the said NN-based VM algorithm as far as conjecture accuracy is concerned. The etching process of semiconductor manufacturing is used as the illustrative example to test and verify the VM conjecture accuracy. One-hidden-layered back-propagation neural networks (BPNN-I) are adopted for establishing the NN models used in the NN-based SS method and the VMconjecture models. Test results show that the NN model created by the selected variables of NN-based SS can achieve better conjecture accuracy than that of MR-based SS. Simple recurrent neural networks (SRNN) are also tested and proved to be able to achieve similar results as those of BPNN-I.

Processing quality of thin film transistor-liquid crystal display (TFT-LCD) manufacturing is a key factor for production yield. In general, the processing quality of production equipment is not only related to its own manufacturing process but also affected by the process result of the previous equipment. Current proposed virtual metrology (VM) architectures are all applied to conjecture processing quality of a single stage. These single-stage VM architectures lack the ability of detecting the processing drift occur between different stages. This paper proposes a novel dual-stage VM architecture for quality conjecturing that involves two pieces of equipment. The architecture consists of two stages. In Stage I, the fore-equipment VM model is established as usual and then the rear-equipment VM model that depends on stage-I VM output is built in Stage II. An example of the proposed dual-stage VM architecture applied to two sets of TFT-LCD chemical vapor deposition (CVD) equipment is presented. Experimental results demonstrate that this dual-stage VM architecture is promising for TFT-LCD manufacturing.

The SIP proxy server, which is an important building block of a SIP network, can be in a form of a cluster to prevent service unavailability caused by software or hardware failures. The design of a SIP proxy server cluster with a single dispatcher in a SIP network faces the single-point-offailure problem. The use of dual SIP dispatcher architecture was proposed and VRRP (Virtual Router Redundancy Protocol) was used as an IP failover mechanism. In this paper, we have designed and implemented a dependable SIP network that includes n + k SIP dispatchers (n active dispatchers + k backup dispatchers) to control and monitor a cluster ofm SIP proxy servers for VoIP and video conferencing applications. A fast failure detection and failover (FFF) scheme has also been proposed. FFF uses OpenAIS as a high availability middleware to perform health check and failover of dispatchers and proxy servers. Experimental results have shown that the FFF scheme reduces the dispatcher failover time by 80 % compared to the VRRP mechanism and also shorten the proxy failover time by 85 % compared to the mechanism provided by OpenSER itself.