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Corot W. Starke

dblp:79/3779 · DBLP profile ↗
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4ranked-venue papers
1as first author
0since 2021 · last 1991
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 100%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
hardware verification and test
0.021991
Iterative algorithms for computing aliasing probabilities · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991
Bounds and analysis of aliasing errors in linear feedback shift registers · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Electronic design automation › hardware verification and test › test response compaction
signature analysis
0.021991
Iterative algorithms for computing aliasing probabilities · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991
Bounds and analysis of aliasing errors in linear feedback shift registers · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Electronic design automation › hardware verification and test › test response compaction
aliasing probability
0.011991
Iterative algorithms for computing aliasing probabilities · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991
Electronic design automation › hardware verification and test › design for testability
built-in self-test
0.011988
Bounds and analysis of aliasing errors in linear feedback shift registers · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Electronic design automation › hardware verification and test
fault detection
0.011988
Bounds and analysis of aliasing errors in linear feedback shift registers · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988

Methods — techniques the papers use, named apart from their topics

markov process model · 0.0iterative algorithm · 0.0boolean expression formulation · 0.0z-transform · 0.0markov process modeling · 0.0linear feedback shift register · 0.0
YearPublicationVenuePosition
1991 Iterative algorithms for computing aliasing probabilities
abstract
An algorithm, ALG-MK, for computing exact aliasing probabilities in signature analysis is derived from a Markov process model of signature analysis. A previous algorithm, ALG-BL, which was derived from a Boolean expressions formulation of the problem, is reformulated so that it can also be reviewed as being based on a Markov process. Both algorithms compute exact aliasing probabilities in signature analysis. The computational complexities of the two models are compared. It is shown that the time complexity of the iterative algorithm ALG-MK is O(L2/sup k/), disregarding slight possible start-up and termination improvements, while that of ALG-BL is O(Lf2/sup k+f/), where k is the size of the signature register, f is the number of feedback taps, and L is the test sequence length. ALG-BL requires more shift and add operations, but requires half the number of floating-point multiplications that ALG-MK requires. The space complexity of ALG-MK is O(2/sup k/), while that of ALG-BL is O(2/sup k+f/). It is also shown that ALG-MK and ALG-BL are formally related through a linear transformation of their state vectors. Both algorithms may be used to study aliasing under generalized error models.>
André Ivanov, Corot W. Starke, Vinod K. Agarwal, Wilfried Daehn, Matthias Gruetzner, Thomas W. Williams
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
1988 Bounds and analysis of aliasing errors in linear feedback shift registers
abstract
Aliasing errors in linear feedback shift registers (LFSRs) used as signature analysis registers in self-testing networks are considered. A bound on aliasing is established by a straightforward algebraic analysis of LFSRs. It is calculated as a function of p, the probability of an error occurring at an output of the network under test. This bound is robust but is only good for p close to 1/2. To investigate the question of what happens to aliasing errors in general, the function of LFSRs is modeled by a Markov process and a solution is obtained by the z-transform. It is shown that for p>1/2 the aliasing probability for primitive polynomials converges much faster to the final steady-state value than for nonprimitive polynomials. For values of p>
Thomas W. Williams, Wilfried Daehn, Matthias Gruetzner, Corot W. Starke
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.4
1986 Comparison of Aliasing Errors for Primitive and Non-Primitive Polynomials
Thomas W. Williams, Wilfried Daehn, Matthias Gruetzner, Corot W. Starke
ITC4
1984 Built-In Test for CMOS Circuits
Corot W. Starke
ITC1