Individual fairness testing (Ift) is a framework to find discriminatory instances within a given classifier. In this paper, we show our idea of a Ift framework, that integrates the notion of data validity, termed "Individual Fairness Testing with Data Validity (Ift-v)". We develop a solid foundation of Ift-v and demonstrate the feasibility of Ift-v. Our preliminary evaluation with Ift-v reveals the possibility that many of discriminatory instances detected by state-of-the-art Ift algorithms are considered invalid. These findings prompt a re-think of the current Ift framework, suggesting a transition from solely focusing on the discovery of discriminatory instances to the consideration of valid ones.

Deep Learning (DL) based self-driving systems are vigorously developing in big companies. While, as several serious accidents were reported with life- and property-loss, the issue of robustness in DL-based self-driving systems inspires great attention, especially facing with some high-risk cases, like adversarial inputs or corner case scenarios in driving. Considering the existing methods are cumbersome in real driving, therefore this paper proposed a novel and simple way which studies data's uncertainty to rise alarm for manual checking. This method developed a metric describing corner case with respect to DL models, and subsequently evaluated data uncertainty. Experiments on a self-driving system verified the feasibility and usefulness of the proposed method. Code in this paper is released [1].

SUMMARY This paper mechanises conformance verification in the setting of the CSP process algebra. The verification strategy is captured by a theorem stated as a process refinement expression, which can be verified by a model checker such as FDR. The conformance relation,cspio, distinguishes input and output events. The process algebraic framework of CSP is used to address compositional conformance verification by establishing compositionality properties forcspiowith respect to the CSP operators. Althoughcspiohas been defined in the standard CSP traces model, one can address quiescence situations using a special output event, in which case it is formally established thatcspiois equivalent to Tretmansioco. All the results have been mechanically proved using the CSP‐Prover. The proposed testing theory has been adopted in an industrial context involving collaboration with Motorola, on testing mobile applications. Several examples and a case study are presented to illustrate the overall approach. Copyright © 2013 John Wiley & Sons, Ltd.

We define a process algebra DS@ to formally describe distributed systems and a process logic SP@ to formally describe their specifications. Then, we present a method to synthesize a distributed system (described in DS@) from given specifications (described in SP@). The main contribution is to show how to check the satisfiability of process logic in which concurrent behavior is distinct from interleaving behavior (i.e. considering true concurrency).