Today, incorporating a new hardware feature into a modern microprocessor is a highly time consuming and expensive process due to long design cycles and high costs of design and verification. To address this challenge, this paper proposes a hybrid processor architecture where an on-chip reconfigurable fabric (FPGA) is tightly coupled with a processing core. A new hardware feature for fine-grained run-time monitoring can be implemented on the FPGA fabric without requiring a re-design or a fabrication of a chip. To evaluate this FPGA co-processing approach, we implemented Dynamic Information Flow Tracking (DIFT), which is arguably one of the most powerful security features against software attacks, on the FPGA fabric. The synthesis and performance emulation results demonstrate that DIFT on the FPGA fabric adds relatively small area and power consumption to a modern microprocessor while providing the performance that is close to the performance of a custom hardware DIFT implementation.

This paper proposes Flex Core, a hybrid processor architecture where an on-chip reconfigurable fabric (FPGA) is tightly coupled with the main processing core. Flex Core provides an efficient platform that can support a broad range of run-time monitoring and bookkeeping techniques. Unlike using custom hardware, which is more efficient but often extremely difficult and expensive to incorporate into a modern microprocessor, the Flex Core architecture allows parallel monitoring and bookkeeping functions to be dynamically added to the processing core and adapt to application needs even after the chip has been fabricated. At the same time, Flex Core is far more efficient than software implementations because its fine-grained reconfigurable architecture closely matches bit level operations of typical monitoring schemes and allows monitoring schemes to operate in parallel to the monitored core. In fact, our experimental results show that monitoring on Flex Core can almost match the performance of full ASIC implementations. To evaluate the Flex Core architecture, we implemented an RTL prototype along with several extensions including uninitialized memory read checking, dynamic information flow tracking, array bound checking, and soft error checking. The prototypes demonstrate that the architecture can support a range of monitoring extensions with different characteristics in an efficient manner. Flex Core takes moderate silicon area and results in far better performance and energy efficiency than software.