Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data.

Ute Feldmann

dblp:80/1683 · DBLP profile ↗
← Back
7ranked-venue papers
4as first author
0since 2021 · last 2013
0009-0009-2159-3232ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 7 · 4 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 60% Electronic design automation · 40%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
circuit simulation
0.011996
Unified complete MOSFET model for analysis of digital and analog circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Electronic design automation › circuit modeling
device model
0.011996
Unified complete MOSFET model for analysis of digital and analog circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Integrated circuit design › analog and mixed-signal circuits
device modeling
0.011996
Unified complete MOSFET model for analysis of digital and analog circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Integrated circuit design › analog and mixed-signal circuits › device modeling
MOSFET model
0.011996
Unified complete MOSFET model for analysis of digital and analog circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Integrated circuit design › analog and mixed-signal circuits › device modeling
surface potential model
0.011996
Unified complete MOSFET model for analysis of digital and analog circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996

Methods — techniques the papers use, named apart from their topics

iterative surface potential computation · 0.0charge-sheet approximation · 0.0
YearPublicationVenuePosition
2013 Analysis of multi-memristor circuits
abstract
In this paper, we propose a novel approach to describe and analyze circuits which consist of any linear circuit connected to an arbitrary number of memristors. Due to the memristors the whole circuit is a nonlinear system. We use a Volterra series approach to derive solutions of voltages and currents in memristive circuits. Thereby, the memristors are presented by polynomial functions which cover a broad class of devices. It will be shown that the different order Volterra kernels depend on the one hand on the structure and parameters of the linear part of the circuit - represented by the admittance or impedance matrix - and on the other hand on the coefficients in the polynomial memristor representation. We consider this approach to be an important step in the development of memristive network theory.
Ute Feldmann, Torsten Schmidt, Ronald Tetzlaff
ISCAS1
1998 Concurrent Technology, Device, and Circuit Development for EEPROMs
abstract
Concurrent engineering aims at integrating technology, device and circuit development in parallel. We will show here an example for an EEPROM development case, which has been realized with a transient circuit simulator. A precise unified EEPROM model was developed describing all characteristics with surface potentials dependent on technological parameters. This new exact model enabled us to realize all requested goals from the first wafer run.
Ute Feldmann, Ronald Kakoschke, Mitiko Miura-Mattausch, G. Schraud
ASP-DAC1
1996 Unified complete MOSFET model for analysis of digital and analog circuits
abstract
In this paper, we describe a complete MOSFET model developed for circuit simulation based on fully consistent physical concept. The model describes all transistor characteristics as a function of surface potentials, which are calculated iteratively at each applied voltage under the charge-sheet approximation. The key idea of this development is to put as much physics as possible into the equations describing the surface potentials. Since the model includes both the drift and the diffusion contributions, a single equation is valid from the subthreshold to the saturation regions. Contrary to the expectation, the results show that our semi-implicit model including the iteration procedures can even reduce the CPU time significantly in comparison with a conventional model similar to BSIM2 including short-channel effects. This is due to the consistent description of the model equations for all transistor characteristics, which results in more straightforward device equations, once the surface potentials have been computed.
Mitiko Miura-Mattausch, Ute Feldmann, Alexander Rahm, Michael Bollu, Dominique Savignac
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
1995 Communication by Chaotic Signals: The Inverse System Approach
abstract
The inverse system approach is an uniform view on hiding and retrieving information from chaotic signals. A clue to the understanding of the system inversion is the relative degree and in connection with it a state transformation into a normal form, both presented in the paper. Inverse system examples published so far are classified with respect to this uniform view. A general structure for system inversion is introduced and applied in a novel circuit example.
Ute Feldmann, Martin Hasler, Wolfgang M. Schwarz
ISCAS1
1995 Benchmarking MOS Transistor Models with Respect to Capacitances and Charges for Analog Applications
abstract
Tsividis and Suyama (1994) have given benchmark circuits to assess model quality for analog applications. They are mainly based on the drain current quality check. We propose here benchmark circuits with respect to capacitances and charges. The most serious failure of existing models is related to the charge partitioning to the source and the drain side. The influence of the failure on real applications will be demonstrated.
Ute Feldmann, Alexander Rahm, Mitiko Miura-Mattausch
ISCAS1
1994 Unified complete MOSFET model for analysis of digital and analog circuits
Mitiko Miura-Mattausch, Ute Feldmann, Alexander Rahm, Michael Bollu, Dominique Savignac
ICCAD2
1994 A Novel Consistent MOSFET Model for CAD Application with Reduced Calculation Time
abstract
The reliability of CAD is dependent on the accuracy of models implemented into circuit simulators. However, precise models such as based on 2D numerical modeling are time consuming. Therefore, simplified analytical models have been developed and widely used. A problem is that such existing models are not valid for advanced MOSFETs with sub-micron channel length due to applied simplifications. By introducing fitting parameters to describe each additional short-channel phenomenon, the consistency of the models is violated. As a result the calculation time for circuit simulation increases considerably. In this paper the authors present a newly developed MOSFET model which describes the transistor characteristics consistently without any nonphysical fitting parameters. Using this model the calculation time is reduced in comparison with the conventional model due to the consistent inclusion of short-channel effects and the diffusion contribution to the carrier transport.>
Mitiko Miura-Mattausch, Alexander Rahm, Michael Bollu, Ute Feldmann, Dominique Savignac
ISCAS4