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Frederick R. Bartram

dblp:80/2672 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1992
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 28% Hardware reliability and fault tolerance · 28% Distributed systems · 28%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
digital circuit design
0.011992
Design of Self-Checking Circuits Using DCVS Logic: A Case Study · IEEE Trans. Computers 1992
Distributed systems
fault tolerance
0.011992
Design of Self-Checking Circuits Using DCVS Logic: A Case Study · IEEE Trans. Computers 1992
Hardware reliability and fault tolerance
self-checking circuits
0.011992
Design of Self-Checking Circuits Using DCVS Logic: A Case Study · IEEE Trans. Computers 1992
Electronic design automation
hardware verification and test
0.011992
Design of Self-Checking Circuits Using DCVS Logic: A Case Study · IEEE Trans. Computers 1992
Electronic design automation › hardware verification and test
VLSI testing
0.011992
Design of Self-Checking Circuits Using DCVS Logic: A Case Study · IEEE Trans. Computers 1992

Methods — techniques the papers use, named apart from their topics

differential cascode voltage switch logic · 0.0
YearPublicationVenuePosition
1992 Design of Self-Checking Circuits Using DCVS Logic: A Case Study
abstract
A technique for designing self-checking circuits using differential cascode voltage switch (DCVS) logic is presented. This technique is used in a design case study and the results obtained through actual implementation and testing of a self-checking circuit are discussed. It is demonstrated that the self-checking capability of the circuit can be used to implement fault tolerance at low hardware-overhead costs.>
Nick Kanopoulos, Dimitris Pantzartzis, Frederick R. Bartram
IEEE Trans. Computers3