In the field of intelligent visual surveillance, the topic of tolerating background motions while detecting foreground motions in dynamic scene is widely explored by the recent foreground detection literatures. Applying the sophisticated background modeling method is a common solution for such dynamic background problem. However, the sophisticated background modeling method is computation intensive and involves huge memory bandwidth on data access. Realizing such approach on a multicamera surveillance system for real-time application can dramatically increase the hardware cost. This paper presents a hardware-oriented foreground detection that is based on human-machine interaction in object level (HMIiOL) scheme. The HMIiOL can vary the conditions for a moving object been regarded as a foreground object. The conditions are depending on background environment and are derived from the information from human-machine interaction. By the HMIiOL scheme, adopting a simple background modeling method can achieve well foreground detection with significant background motions. A processor based on system-on-chip design is presented for the HMIiOL-based foreground detection. The presented processor consists of accelerators to increase throughput of the computationally intensive tasks in the algorithm, and a reduced instruction set computing unit to handle the interaction task and the noncomputation-intensive tasks. Pipelining and parallelism techniques are used to increase the throughput. The detecting capability of the processor reaches HD720 at 30 Hz. The maximum throughput can be up to 32.707 Mpixels/s. Performance evaluation and comparison with existed foreground detection hardware show the improvement of our design.

In recent years, intelligent video surveillance attempts to provide content analysis tools to understand and predict the actions via video sensor networks (VSN) for automated wide-area surveillance. In this emerging network, visual object data is transmitted through different devices to adapt to the needs of the specific content analysis task. Therefore, they raise a new challenge for video delivery: how to efficiently transmit visual object data to various devices such as storage device, content analysis server, and remote client server through the network. Object-based video encoder can be used to reduce transmission bandwidth with minor quality loss. However, the involved motion-compensated technique often leads to high computational complexity and consequently increases the cost of VSN. In this paper, contextual redundancy associated with background and foreground objects in a scene is explored. A scene analysis method is proposed to classify macroblocks (MBs) by type of contextual redundancy. The motion search is only performed on the specific type of context of MB which really involves salient motion. To facilitate the encoding by context of MB, an improved object-based coding architecture, namely dual-closed-loop encoder, is derived. It encodes the classified context of MB in an operational rate-distortion-optimized sense. The experimental results show that the proposed coding framework can achieve higher coding efficiency than MPEG-4 coding and related object-based coding approaches, while significantly reducing coding complexity.

Tracking multiple targets in complex situation is challenging. The difficulties are tackled multiple targets with occlusions, especially when multiple involved targets are grouped and moving together in appearance. In this paper, we present a multiple targets tracking system for the management of occlusion problem. The proposed algorithm introduces a geometric shape co-tracking strategy. It decomposes targets into geometric shapes located on body and head parts based on reasonable target geometry consideration. Features selected from the decomposed geometric shapes then can be used to track targets through intersections such as occlusion. Projection histogram and ellipsoid shape model are adopted to manage decomposed geometric shapes corresponding to each target. Tracking is done through Kalman filtering process with high efficient and low complexity issue. Experimental results show that the occlusion of grouped targets can be tracked successfully on recent challenging benchmark sequences.

The parallel connected component labeling used in binary image analysis is reconsidered in this paper for the high throughput and intermediate memory requirements problem on high dimensional image sequence. It is based on a proposed dual-parallel connected component labeling method. The main idea is to break the sequentiality of the labeling procedure by separating image into slices and to correctly delimit the extent of all connected components locally, on each slice, simultaneously. According to the proposed method, a scalable architecture which can be adaptive to different throughput requirement is derived. The proposed architecture consists of local label assignment, local label fusion, and global process unit. The forest structure is introduced to cope with both global and local label equivalent. Based on the forest structure, find and union operations are implemented to complete the entire connected components labeling during two raster scans. Performance of the proposed architecture estimated in terms of the number of clocks and memory requirement are brought forward to justify the superiority of the novel design compared against previous implementation.

Automatic understanding of events happening at a site is the ultimate goal for many visual surveillance systems. Understanding of events requires that certain lower level computer vision tasks be performed. These include foreground detection, labeling foreground parts, and tracking targets. To achieve these tasks, it is necessary to build background subtraction and foreground tracking in the scene. This paper proposed a hardware-oriental algorithm for background subtraction and foreground tracking. To achieve real-time processing and flexibility, the system is then mapped to a SoC architecture with a single camera. The architecture contains two acceleration units and a programmable micro-processor unit. The usage of micro-processor can provide high flexibility for events understanding in different surveillance by user program. And the proposed accelerator hardware unit is used to increase the entire throughput. Simulation results show that the foreground detection and tracking results are satisfied. Performance of the proposed architecture estimated in terms of the number of clocks is brought forward to justify the real-time processing ability for 30 CIF frames per second.

This paper presents an architecture design for a low cost and low complexity foreground object detection based on Multi-model Background Maintenance (MBM) algorithm . The MBM framework basically contains two principal features. These features consist of static and dynamic pixels to represent the characteristic of background. Under this framework, a pure time-varying background image is maintained and learned using the statistical information of the multiple Gaussian distribution with principal features. In the MBM architecture, look-up table based Gaussian density function architecture is proposed. Three look-up tables are used for exponential and division of the Gaussian density function. The characteristic of Gaussian density function is also used to enormously reduce the table size in a low cost and low complexity consideration. The total gate count of the foreground object detection architecture is about 14.4 K gates with TSMC 0.18 um technology. The operation frequency of this design is up to 100 MHz.