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Kichul Kim

dblp:81/1731 · DBLP profile ↗
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9ranked-venue papers
5as first author
0since 2021 · last 2018
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 4 first-authorArtificial intelligence and machine learning · 2 · 1 first-authorGraphics, computer vision, multimedia, augmented reality and games · 2 · 1 first-authorSecurity and privacy · 1Software engineering, systems software and programming languages · 1 · 1 first-authorTheory of computation · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Memory systems · 96% Interconnection networks and networks-on-chip · 4%
Theoretical computer science
2 papers
Combinatorics and discrete mathematics · 100%

Topics — the 7 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › memory access patterns
conflict-free access
0.021993
Latin Squares for Parallel Array Access · IEEE Trans. Parallel Distributed Syst. 1993
Parallel memory systems for image processing · CVPR 1989
Memory systems › memory architecture
parallel memory system
0.021993
Latin Squares for Parallel Array Access · IEEE Trans. Parallel Distributed Syst. 1993
Parallel memory systems for image processing · CVPR 1989
Memory systems
skewing scheme
0.021993
Latin Squares for Parallel Array Access · IEEE Trans. Parallel Distributed Syst. 1993
Perfect Latin Squares and Parallel Array Access · ISCA 1989
Memory systems › memory architecture
memory module
0.011989
Perfect Latin Squares and Parallel Array Access · ISCA 1989
Memory systems › memory access
parallel memory access
0.011989
Perfect Latin Squares and Parallel Array Access · ISCA 1989
Combinatorics and discrete mathematics › combinatorial design
latin squares
0.021989
Perfect Latin Squares and Parallel Array Access · ISCA 1989
Parallel memory systems for image processing · CVPR 1989
Interconnection networks and networks-on-chip › switching network › multistage interconnection network
benes network
0.011993
Latin Squares for Parallel Array Access · IEEE Trans. Parallel Distributed Syst. 1993

Methods — techniques the papers use, named apart from their topics

perfect latin square construction · 0.0latin square skewing · 0.0latin squares · 0.0
YearPublicationVenuePosition
2018 Practical Consideration Factors to Design Array Configuration of Direction Finding System for Airborne Signal Intelligence
abstract
Airborne signal intelligence (SIGINT) systems must be capable of locating radio signal sources. Direction finding (DF) to support this capability is an important factor. There are some practical considerations to be taken when designing the array configuration of a DF system for airborne SIGINT systems. This paper summarizes the practical factors when designing the array configuration of the DF system for airborne SIGINT. In particular, it focuses on four areas: antenna consideration factors when installing the DF system for airborne SIGINT from a practical point of view, array configuration methods for airborne communications intelligence and electronic intelligence, and a numerical analysis to select the optimum antenna position for airborne SIGINT.
Jong-Hwan Lee, Jeungmin Joo, Kichul Kim, Young-Ju Park
Secur. Commun. Networks3
2005 A Hardware Implementation for Fingerprint Retrieval
Yongwha Chung, Kichul Kim, Sung Bum Pan, Neungsoo Park
KES (3)2
1998 Design and Implementation of Format Conversion Filters for MPEG-4
Nam Ik Cho, Kichul Kim, Sang Uk Lee
J. Vis. Commun. Image Represent.2
1993 Latin Squares for Parallel Array Access
abstract
A parallel memory system for efficient parallel array access using perfect latin squares as skewing functions is discussed. Simple construction methods for building perfect latin squares are presented. The resulting skewing scheme provides conflict free access to several important subsets of an array. The address generation can be performed in constant time with simple circuitry. The skewing scheme can provide constant time access to rows, columns, diagonals, and N/sup 1/2/*N/sup 1/2/ subarrays of an N*N array with maximum memory utilization. Self-routing Benes networks can be used to realize the permutations needed between the processing elements and the memory modules. Two skewing schemes that provide conflict free access to three-dimensional arrays are also discussed. Combined with self-routing Benes networks, these schemes provide efficient access to frequently used subsets of three-dimensional arrays.>
Kichul Kim, Viktor Prasanna 0001
IEEE Trans. Parallel Distributed Syst.1
1992 Perfect Latin Squares
Katherine Heinrich, Kichul Kim, Viktor Prasanna 0001
Discret. Appl. Math.2
1991 An Iterative Sparse Linear System Solver on Star Graphs
Kichul Kim, Viktor Prasanna 0001
ICPP (3)1
1990 An Efficient Mapping of Directed Graph Based Computations onto SIMD Hypercube Arrays and Applications
Kichul Kim, Viktor Prasanna 0001
ICPP (2)1
1989 Parallel memory systems for image processing
abstract
A novel memory system is proposed for image processing. Latin squares, which are well known combinatorial objects, are used as the skew function of the memory system. A Latin square with desired properties for image-array access is introduced. The resulting memory system provides access to various subsets of image data (rows, columns, diagonals, main subsquares, etc.) without memory conflict. The memory modules are fully utilized for most frequently used subsets of image data. The address generation can be performed in constant time. This memory system achieves constant-time access to rows, columns, diagonals, and subarrays using a minimum number of memory modules.>
Kichul Kim, Viktor Prasanna 0001
CVPR1
1989 Perfect Latin Squares and Parallel Array Access
abstract
A new nonlinear skewing scheme is proposed for parallel array access. We introduce a new Latin square(perfect Latin square) which has several properties useful for parallel array access. A sufficient condition for the existence of perfect Latin squares and a simple construction method for perfect Latin squares are presented. The resulting skewing scheme provides conflict free access to various subsets of an N x N array using N memory modules. When the number of memory modules is an even power of two, address generation is performed in constant time using a simple circuit. This scheme is the first memory scheme that achieves constant time access to rows, columns, diagonals, and N1/2 x N1/2 subarrays of an N x N array using the minimum number of memory modules.
Kichul Kim, Viktor Prasanna 0001
ISCA1