VLDB 2026 Research / reviewers in the wild / expert
Masanao Aoki
dblp:82/1147
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1961
—ORCID · unresolved
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 70% Memory systems · 30% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › design methodology
circuit design methodology |
0.0 | 1 | 1961 | Bilateral Switching Using Nonsymmetric Elements · IRE Trans. Electron. Comput. 1961 |
Electronic design automation › design optimization
design parameter optimization |
0.0 | 1 | 1961 | Bilateral Switching Using Nonsymmetric Elements · IRE Trans. Electron. Comput. 1961 |
Memory systems
magnetic core memory |
0.0 | 1 | 1961 | Bilateral Switching Using Nonsymmetric Elements · IRE Trans. Electron. Comput. 1961 |
Methods — techniques the papers use, named apart from their topics
nonsymmetric element analysis · 0.0multidimensional design space reduction · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1961 | Bilateral Switching Using Nonsymmetric ElementsabstractMagnetic-core memory elements characteristically require bipolar applied fields. The vanishing inner diameter of toroids and the loss of the third dimension entirely in deposited thin films demands minimization of the number of wires. A configuration which has been investigated and applied in a word organized memory at the University of California at Los Angeles is illustrated in Fig. 2. It consists of a pair of mutually inverted and parallel connected transistors. The transistors are not in general symmetrical. This paper discusses some of the system considerations which determine the important design parameters. Methods for location of regions of satisfactory operation in the many-variable space of the inverted transistor pair are described. Although a particular design problem is discussed, attention is focused on the question, ``What classical and new procedures can we use to reduce the number of dimensions in such design problems?'' The power of the computer as a design tool is crucially dependent upon such processes. Masanao Aoki, Gerald Estrin |
IRE Trans. Electron. Comput. | 1 |