Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Trek S. Palmer

dblp:82/2354 · DBLP profile ↗
← Back
4ranked-venue papers
0as first author
0since 2021 · last 2008
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2Security and privacy · 1Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
1 paper
Systems and software security · 100%
Software engineering, system software, and programming languages
1 paper
Runtime systems and virtual machines · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Systems and software security › exploitation mitigation
code injection defense
0.012003
Randomized instruction set emulation to disrupt binary code injection attacks · CCS 2003
Systems and software security
exploitation
0.012003
Randomized instruction set emulation to disrupt binary code injection attacks · CCS 2003
Runtime systems and virtual machines
binary translation
0.012003
Randomized instruction set emulation to disrupt binary code injection attacks · CCS 2003

Methods — techniques the papers use, named apart from their topics

instruction set randomization · 0.1binary translation · 0.1
YearPublicationVenuePosition
2008 Towards universal code generator generation
abstract
One of the most difficult tasks a compiler writer faces is the construction of the code generator. The code generator is that part of the compiler that translates compiler intermediate representation (IR) into instructions for a target machine. Unfortunately, implementing a code generator "by hand" is a difficult, time consuming, and error prone task. The details of both the IR and target instruction set must be carefully considered in order to generate correct and efficient code. This, in turn, requires an expert in both the compiler internals as well as the target machine. Even an expert, however, can produce a code generator that is difficult to verify and debug. In this paper we present a universal approach for automating the construction of correct code generators. In particular, we show that both the compiler IR and target instruction set semantics can be described by a machine description language and leveraged by a heuristic search procedure to derive code generator patterns. We then utilize formal methods to determine if the IR and target sequence pairs that make up these patterns are semantically equivalent.
Timothy Richards, Edward K. Walters II, J. Eliot B. Moss, Trek S. Palmer, Charles C. Weems
IPDPS4
2008 CASL: A rapid-prototyping language for modern micro-architectures
Edward K. Walters II, J. Eliot B. Moss, Trek S. Palmer, Timothy Richards, Charles C. Weems
Comput. Lang. Syst. Struct.3
2007 Modeling Modern Micro-architectures using CASL
abstract
We overview CASL, the CoGenT architecture specification language, a mixed behavioral-structure architecture description language designed to facilitate fast prototyping and tool generation for computer architectures with deep pipelines and complicated timing. We show how CASL can describe pipelines, dynamic information contexts, and contention using the DLX/MIPS architecture as an example.
Edward K. Walters II, J. Eliot B. Moss, Trek S. Palmer, Timothy Richards, Charles C. Weems
IPDPS3
2003 Randomized instruction set emulation to disrupt binary code injection attacks
abstract
Binary code injection into an executing program is a common form of attack. Most current defenses against this form of attack use a 'guard all doors' strategy, trying to block the avenues by which execution can be diverted. We describe a complementary method of protection, which disrupts foreign code execution regardless of how the code is injected. A unique and private machine instruction set for each executing program would make it difficult for an outsider to design binary attack code against that program and impossible to use the same binary attack code against multiple machines. As a proof of concept, we describe a randomized instruction set emulator (RISE), based on the open-source Valgrind x86-to-x86 binary translator. The prototype disrupts binary code injection attacks against a program without requiring its recompilation, linking, or access to source code. The paper describes the RISE implementation and its limitations, gives evidence demonstrating that RISE defeats common attacks, considers how the dense x86 instruction set affects the method, and discusses potential extensions of the idea.
Elena Gabriela Barrantes, David H. Ackley, Trek S. Palmer, Darko Stefanovic, Dino Dai Zovi
CCS3