Mobile health is gaining increasing importance for society and the quest for new power efficient devices sampling biosignals is becoming critical. We discuss a new scheme called Variable Pulse Width Finite Rate of Innovation (VPW-FRI) to model and compress ECG signals. This technique generalizes classical FRI estimation to enable the use of a sum of asymmetric Cauchy-based pulses for modeling electrocardiogram (ECG) signals. We experimentally show that VPW-FRI indeed models ECG signals with increased accuracy compared to current standards. In addition, we study the compression efficiency of the method: compared with various widely used compression schemes, we showcase improvements in terms of compression efficiency as well as sampling rate.

The authors discuss major issues related to algorithms and architecture of the transceiver system and be the signal processor that they designed and implemented in a single VLSI chip. The functions of each block are described in the context of the overall system. The ideas behind their algorithms and architectural design are summarized. While the main focus of this study is on the signal processor, a companion analog chip in the transceiver performs certain front-end processing and is briefly summarized. The transmitter is entirely an analog implementation, except for scrambling. It consists of a D/A converter and a second-order Butterworth filter, followed by a line driver that feeds line pulses to the hybrid. A/D conversion at the receiver is done by a sigma-delta modulator with a double integration loop, which places the quantization noise at high frequencies mostly outside the baseband.>

A new algorithmic technique is presented for efficiently implementing the end-point decisions necessary to separate and segment speech from noisy background environments. The algorithm utilizes a set of computationally efficient production rules that are used to generate speech and noise metrics continuously from the input speech waveform. These production rules are based on statistical assumptions about the characteristics of the speech and noise waveform and are generated via time-domain processing to achieve a zero delay decision. An end-pointer compares the speech and silence metrics using an adaptive thresholding scheme with a hysteresis characteristic to control the switching speed of the speech/silence decision. The paper further describes the application of this algorithm to silence compression of speech in which speech segments are encoded with a low bit-rate encoding scheme and silence information is characterized by a set of parameters. In the receiver the resulting packetized speech is reconstructed by decoding the speech segments and reconstructing the silence intervals through a noise substitution process in which the amplitude and duration of background noise is defined by the silence parameters. A noise generation technique is described which utilizes an 18th order polynomial to generate a spectrally flat pseudo-random sequence that is filtered to match the mean coloration of acoustical background noise. A technique is further described in which the speech/silence transitions are merged rather than switched to achieve maximum subjective performance of the compression technique. The above silence compression algorithm has been implemented in a single DSP-20 signal processing chip using sub-band coding for speech encoding. Using this system, experiments were conducted to evaluate the performance of the technique and to verify the robustness of the endpoint and silence compression over a wide range of background noise conditions.

Development of Circuit Switched Digital Capability (CSDC) in the United States and the general evolution toward an integrated digital services network worldwide has created interest in the development of 56 or 64 kbps digital coders for audio signals with 6 or 7 kHz bandwidth. To date there have been a number of coders proposed but no formal testing of them. Furthermore, a method for testing them has not been proposed. In this paper we discuss the problem of testing such coders and describe a series of both objective and subjective tests which can be performed using a real-time coding system. We discuss the results of these tests when performed on a selection of coders which we have implemented.

In this paper we report on a study of a technique for 32-band subband/transform coding at 16 kb/s. This approach occupies the middle range of algorithm complexities and frequency resolution between that of Sub-Band Coding (SBC) and Adaptive Transform Coding (ATC). Two designs for 16 kb/s 32-band coders have been simulated on a laboratory computer. The results of informal listening tests indicate that the new designs offer performance comparable to existing ATC techniques while having complexities roughly three times that of existing 4 and 5 band sub-band coders.

A novel technique for the design of analysis/synthesis filter banks, such as quadrature-mirror filter (QMF) banks, is presented. The technique is iterative, but each iteration step is mathematically simple. It is based upon a sectional approximation of the filter bank wherein the synthesis section is taken to be known from the previous iteration, and the analysis section is optimized according to the performance criterion. The strategy is then reversed, and the synthesis section optimized. At each iteration, each of these two steps results in an eigenvalue-eigenvector problem of a matrix with dimensionality equal to the number of taps. The technique is exemplified in detail for the QMF bank design problem.

A real-time pitch/periodicity detector has been implemented on the Bell Laboratories Digital Signal Processing (DSP) integrated circuit. The design is based on a novel modification of the autocorrelation type pitch detector. The modification allows the computation and peak-picking of the autocorrelation function of an 8 kHz sampled input signal to be performed within the memory and real-time constraints of a single DSP. The algorithm is intended for applications in speech processing and coding where pitch or a measure of long-term periodicity of a signal is required. Specifically it has been applied in the design of a 9.6 kb/s speech coding system discussed in a companion paper. The pitch detector measures pitch over the normal range of most speakers. It does not compute a voiced/unvoiced decision.

A digital speech coder has been designed for real-time operation for a data rate of 9.6 kb/s. The design is based on a combination of two speech compression techniques: Time-Domain Harmonic Scaling (TDHS) and Sub-Band Coding (SBC). It is a highly modularized hardware implementation using five Bell Laboratories Digital Signal Processor (DSP) integrated circuits as the key processing elements. Three DSPs are used in the encoder for pitch detection, TDHS compression and sub-band encoding. Another two DSPs are used in the receiver for sub-band decoding and TDHS expansion.

This paper reviews our recent efforts in the design and implementation of real-time speech coders. We discuss our approach and methodology for real-time hardware for coder techniques ranging from low to high complexity. Examples of realizations are given for each approach. They include adaptive differential PCM coding, subband coding, harmonic scaling with subband coding, and adaptive transform coding. Low to medium complexity techniques are based on the use of the Bell Laboratories digital signal processing (DSP) integrated circuit. High complexity block processing techniques are based on the use of an array processing computer. We conclude with an assessment of the performance versus complexity tradeoffs involved in these coding methods.

In this paper we discuss the implementation of sub-band coding (SBC) on a programmable digital signal processing (DSP) integrated circuit developed at Bell Laboratories. A two-band SBC has been developed for use in 7 kHz bandwidth transmission (AM broadcast quality) at a bit-rate of 56 kb/s. A four-band SBC has been developed for use in speech coding (3.2 kHz bandwidth) at bit rates ranging from 16 kb/s to 24 kb/s. We first review the capabilities of the DSP integrated circuit. We then discuss the hardware and software development environment used for programming real-time SBC on the DSP. Next we discuss block diagrams of the SBC algorithms that were implemented. Finally, we discuss aspects of how these algorithms were programmed in real-time on the DSP and features of the DSP that are utilized.

The log likelihood measure has been widely used in speech recognition for comparing speech signals. Recently it has been proposed as a measure for assessing the quality of coded speech. In this paper we present an interpretation of the log likelihood ratio measure within the theoretical framework of a waveform coder distortion model.

The purpose of this paper is to describe a scheme for low-bit-rate transmission of speech. The scheme consists of a cascade of a codec with a post-processor. The codec is based on a modified version of the LPC Vocoder Driven Adaptive Transform Coding algorithm. The Post-Processor performs a short-time Fourier analysis/synthesis at the receiver output and, by exploring the known structure of the quantization noise introduced by the codec, it is capable of speech enhancement. The performance of this scheme will be demonstrated at 9.6 kb/s and at 7.2 kb/s.

In this paper we examine the use of variable rate coding concepts for TASI and packet speech transmission systems. The paper is divided into three major parts. In the first part, the theoretical performance of variable rate coding is analyzed for multiple user (TASI) applications. Potential gains are experimentally determined from twoparty telephone conversation data for up to 12 shared conversations on a channel. In the second part of the paper, the buffer control mechanism for a dynamic buffer scheme for coupling a variable rate coder to a fixed rate (or slowly varying rate) channel is analyzed. It is shown that the buffer control can be modeled as a second-order control system and, under adverse parameter settings, the system can be unstable. By an appropriate design and parameter setting, the buffer control can be stabilized, The insight developed from this particular buffer control mechanism may also lead to a better understanding of other buffer control problems in variable rate transmission or packet systems. In the third part of the paper, a practical method is analyzed for implementing a variable rate ADPCM system for multiple user applications. Examples of computer simulations of the system are presented.

In this paper we discuss several new issues in the design of sub-band coders for low bit-rate speech coding. We use unequally spaced filter banks to match perceptual criteria for speech. In particular, we apply quadrature mirror filter techniques to provide cancellation of aliasing between sub-bands, thus permitting a reduction in the order of the filters. Preliminary investigations have been made into the use of pitch prediction within the sub-bands. Designs will be discussed for coder bit rates of 9.6 and 16 kb/s and their performance will be compared with earlier sub-band coder designs.

In this paper a novel method is proposed for implementing pitch prediction inside of the sub-bands of a sub-band coder. The method uses digital linear phase shifters based on a bandpass interpolation scheme to achieve the non-integer delays necessary in the feedback loops of the pitch predictors.

In this paper we examine a number of concepts and issues concerning variable rate coding of speech. We formulate the problem as a multistate coder (i.e. a coder that can operate at several bit rates) coupled with a time buffer. We first analyze the theoretical aspects of the problem by examining it in the context of a block processing formulation. We also allude to a multiple user configuration of variable rate coding for TASI type applications. A practical example of a variable rate ADPCM coder is presented and applied to speech coding. It is shown that by careful design the algorithm can be made to be as robust to channel errors as that of a fixed rate ADPCM coder.

Adaptive Transform coding techniques for speech communication have recently received considerable attention. The basic concept of these methods is to divide the speech into frequency components by a suitable transform and then encode them using adaptive PCM. Examples of designs and performance of adaptive transform coders will be presented for bit rates in the range of 8 to 16 kbs.

In this paper we investigate the performance of three well known system identification methods based on an FIR (finite impulse response) model of the system. The methods will be referred to in this paper as the least squares analysis (LSA) method, the least mean Squares adaptation algorithm (LMS) and the short-time spectral analysis (SSA) procedure. Our particular interest in this paper concerns the performance of these algorithms in the presence of high noise levels and in situations where the input signal is bandlimited. Both white and nonwhite random noise signals as well as speech signals are used as test signals to measure the performance of the system identification techniques, Quantitative results in terms of an accuracy measure of system identification are presented and a simple analytical model is used to explain the measured results.

This paper presents the results of a pilot study comparing four different speech waveform coding techniques of varying complexity. Coder transmission rates of 24, 16, and 9.6 Kb/s were used in the experiment. Subjective ratings and objective measurements of quality are obtained and compared. A number of conclusions are drawn concerning the quality and complexity, of different coding techniques. By comparing the objective measurements to the subjective ratings a number of conclusions are also drawn concerning the strengths and weaknesses of various (objective) quality measures of speech waveform coders.

In this paper we discuss a number of issues concerning the design of optimal decimators, and interpolators and their application to narrow band filtering. We show that a design which is optimized for minimum storage is essentially optimum in terms of its number of required multiplications and additions as well. We then discuss a practical scheme for efficiently implementing decimators and interpolators.

A rationale is advanced for digitally coding speech signals in terms of sub-bands of the total spectrum. The approach provides a means for controlling and reducing quantizing noise in the coding. Each sub-band is quantized with an accuracy (bit allocation) based upon perceptual criteria. As a result, the quality of the coded signal is improved over that obtained from a single full-band coding of the total spectrum. In one implementation, the individual sub-bands are low-pass translated before coding. In another, "integer-band" sampling is employed to alias the signal in an advantageous way before coding. Other possibilities extend to complex demodulation of the sub-bands, and to representing the subband signals in terms of envelopes and phase-derivatives. In all techniques, adaptive quantization is used for the coding, and a parsimonious allocation of bits is made across the bands. Computer simulations are made to demonstrate the signal qualities obtained for codings at 16 and 9.6 Kbits/sec.